实践表明，这是一种实用的数字乘法器。
本文简要介绍了几种结构的数字乘法器。
This paper presents briefly the digital multiplier with different structure.
着重讨论了以大规模集成电路为基础的并发结构数字乘法器的设计和性能。
The design and performance of multiplier with concurrent structure based on large scale integrated circuits technique are discussed in detail.
DSP内部采用程序和数据分开的哈佛结构，具有专门的硬件乘法器，可以用来快速地实现各种数字信号处理算法。
DSP adopts Harvard structure in which program memory and data memory are divided. DSP can realize various digital signal process algorithms by special hardware multiplier.
本文提出了一种信号等区间分割、中点采样模拟数字混合乘法器。
The paper proposed a signal equal divided middle sampling analog digital multiplier.
数字信号处理器包含了中央算术逻辑单元、乘法器单元、移位器单元、排序器单元、辅助寄存器单元、中断单元的设计。
The digit signal processor embodies the center arithmetic logic unit, Multiplier unit, Shifter unit, Sequencing unit, Auxiliary register unit, interception unit.
乘法器是数字信号处理和媒体处理中应用最多，硬件面积最大的执行部件。
Multiplier is one of the most important units used in DSP and multimedia data processing.
数字信号处理(dsp)具有并行的硬件乘法器、流水线结构以及快速的片内存储器等资源，其技术广泛地应用于数字信号处理的各个领域。
DSP technologies have applied in every field of digital signal processing because of its parallel multiplier, pipeline structure and fast On-Chip memory.
乘法器是数字信号处理系统中的关键。
Multiplier is the key in the Digital Signal Processing System.
乘法器是数字信号处理系统中的关键。
Multiplier is the key in the Digital Signal Processing System.
应用推荐