完成通道二倍插值滤波器的FPGA实现与验证。
本文讨论了全数字接收机中插值滤波器的优化设计问题。
In this paper, the problem of optimal design of interpolation filter for all digital receiver is discussed.
插值滤波器的设计问题是接收机全数字化实现的核心问题之一。
The design of interpolation filter is one of the important problems for all digital implementation of receiver.
对于亚像素精度，它支持与六抽头插值滤波器四分之一像素运动矢量。
For subpixel precision, it supports quarter-pel motion vectors with a 6-tap interpolation filter.
深入讨论和研究了全数字接收机中的特殊问题—插值滤波器的设计和控制问题。
The special and also key aspects , interpolation filters design and control . of all digital receivers are studied thoroughly.
最后针对定时调整算法，研究了插值等式、多项式插值滤波器及插值控制，模拟了插值环路的性能。
Thirdly, interpolation equation, polynomial interpolation filter and interpolation control for timing adjustment are studied. The performance of interpolation loop is simulated.
利用码间串扰量的度量准则，对不同的成形滤波函数研究了插值滤波器的参数优化估计及其抗时钟抖动性能。
By using the measure criterion of intersymbol interference, the parameter optimization and robustness of timing jitter of interpolation filter for a few kinds of shaping functions has been studied.
CIC滤波器已经被证明是在高速抽取和插值系统中非常有效的单元。
CIC filter has proven to be a very effective cell in high-speed decimation and interpolation systems.
环路为反馈结构，包括插值器、时钟误差检测和环路滤波器三个部分。
The loop is a second order phase lock loop, consisting of an interpolator, a timing error detector and a loop filter.
将可编程抽取、插值器与多级积分梳状滤波器（CIC）相配合，实现高效数字抽取和插值模块。
A programmable decimation and interpolation ratio module onnected with multistage cascade integrator comb (CIC) filter is designed to implement high efficient decimator and interpolator.
另外，由于内插滤波器是确定的，因而这些插值算法就缺乏利用图像本身信息的机制。
On the other hand, due to the low-pass filters fixed, these algorithms fail to utilize the information of the image itself.
剔除并补正了飞行实验数据中的野值；设计了一个低通滤波器来滤除数据中的高频噪声；用中心插值演算法对数据二次平滑。
Then a low pass filter is designed to filter high - frequency noise in data. and smooth data again by means of central interpolation algorithm ;
极限情况下，当混叠十分严重时，相对于理想低通滤波器，用维纳滤波器进行亚象素插值能将预测残差均方和减少一半。
In an extreme case, when the aliasing effects are very severe, using wiener filter can reduce the prediction errors'energy by about 50% in comparison with using the ideal low pass filter.
极限情况下，当混叠十分严重时，相对于理想低通滤波器，用维纳滤波器进行亚象素插值能将预测残差均方和减少一半。
In an extreme case, when the aliasing effects are very severe, using wiener filter can reduce the prediction errors'energy by about 50% in comparison with using the ideal low pass filter.
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