实现了基于虚拟指令集的通用处理器内核，同时实现了通用的系统互联模型，处理器模型，存储器模型、外围设备模型和调试模型。
On the framework, it develops a universal instruction simulator core and system inter-connection model, processor model, memory model, device model and debug model.
提出嵌入式新型网络数控系统中央数控单元硬件实现方案，搭建起中央数控单元先进精简指令集处理器和数字信号处理器的软件架构。
A hardware implementation scheme for the embedded-based network numerical control is proposed, and the software architectures of ARM and DSP modules of the central NC unit are introduced.
文章介绍了一种采用多时钟定量系统设计八位复杂指令集微处理器的方法。
This paper introduces the multi - clocks method in 8 - bit complex instruction set MCU system - level architecture.
它用于复杂指令集计算机微处理器或者单处理机简化指令系统计算机系统的时钟分布。
It is designed to provide clock distribution for CISC microprocessors single processor RISC systems.
它用于复杂指令集计算机微处理器或者单处理机简化指令系统计算机系统的时钟分布。
It is designed to provide clock distribution for CISC microprocessors single processor RISC systems.
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