因此，FPGA的人发送的原因在MSI的消息通过总线编码。
Therefore the FPGA guys are sending the reason coded in the MSI message over the bus.
同时总线编码技术对于降低DSP总线功耗有明显的效果，所以这一技术对DSP低功耗设计有重要的意义。
The low power on-chip buses encoding technique is resultful for reducing the power consumption of DSP buses, so it is meaning for DSP low power design.
提出了一种新的低功耗非冗余排序总线编码方法，通过对改进的偏移地址线的动态重排以降低具有高负载的地址总线的功耗。
The irredundant sorting bus encoding method reduces the power dissipation of highly capacitive memory address bus based on the dynamic reordering of the modified offset address bus lines.
下面的代码展示了设备连接至外部总线并将其片选号编码进地址的地址分配。
The code below show address assignment for devices attached to the external bus with the chip select number encoded into the address.
为了降低总线翻转率通常对总线进行编码。
The method of bus encoding is for cutting down the transition frequency.
计算机系统也有总线，硬盘在编码时有两种途径，第一种是MF M协议，第二种是RLL协议。
Computer systems also include a Bus, the hard drive which has encoding data on the hard drive there has been two approaches firstly being the MFM, and the next being RLL.
介绍了一种针对单圈绝对式光电轴角编码器而设计的基于PCI总线的实时数据采集系统。
A real-time data acquisition system based on PCI Bus was introduced. The system was designed for single-ring absolute optical shaft encoder.
数据传送操作是通过CRC编码来保护的，因此，由拔插卡引起的任何位的变动将会被SD总线管理器侦测到。
Data transfer operations are protected by CRC codes; therefore, any bit changes induced by card insertion and removal can be detected by the SD bus master.
论文介绍了多功能总线控制器编码器的设计，编码器有六个模块组成，分别为位控制单元、FIFO单元、帧分界符单元、数据转换单元、CRC校验单元和曼彻斯特编码单元。
The paper describes the design of encoder which is divided into seven modules: bit control unit, FIFO unit, frame delimiter unit, data conversion unit, CRC unit, Manchester encoding unit.
设计了基于CAN总线的地址编码器，通信总站的数码显示电路，控制继电器电路，LNK501开关电源芯片电路。
Design the CAN bus address encoder, communication terminal digital display circuit, control relay circuit, LNK501 switching power supply chip circuitry.
介绍了采用CAN总线数据传输方式的系统中，光电编码器CAN总线接口的设计与应用。
Photoelectric encoder CAN bus interface is put forward in order to make photoelectric encoder used in the system which adopts CAN bus as data transmission method.
提出了一种新颖而实用的H．263视频编码方案，其采用了硬件辅助的方法并利用PCI总线的高带宽来达到实时效果；
This paper proposes a new and practical implementation scheme of H. 263 video coding which is aided by hardware and utilizes the high bandwidth of PCI bus to achieve the real time effect perfectly.
OPTOCODE编码器可提供一个范围广泛的总线接口，涵盖几乎所有的应用领域。
OPTOCODE encoders are available with a wide range of bus interfaces covering virtually all application areas.
主要讨论在网络差错控制中，异步总线的延迟不敏感编码的基于比较的实现问题，即校验码的位数≥数据的位数；另外编码还必须满足初始化条件。
The article introduces the implementation issues of asynchronous logic underlying comparison-based error control for systematic delay-insensitive codes in the networks.
内有编码电路(可不编址)，编码时可直接接入报警总线，不编码时需配控制模块才能使用。
Coding circuit inside (may not code), can be connected in alarm bus directly when coded and matched with module when not coded.
提出了一种基于PCI总线的MPEG - 2编码器的实现方案，给出了硬件实现的详细说明。
In this paper, the scheme of an MPEG-2 encoder based on PCI bus is brought forward, and its hardware implementation is described in detail.
提出了一种基于PCI总线的MPEG - 2编码器的实现方案，给出了硬件实现的详细说明。
In this paper, the scheme of an MPEG-2 encoder based on PCI bus is brought forward, and its hardware implementation is described in detail.
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