然后，接收方从xdr译码消息，并对数据进行处理。
The receiver then decodes the message from XDR and does something with the data.
文中给出了系统的译码矩阵方程，并对几种特例进行了讨论。
The decoding matrix equations of the system are given, and some special examples have been discussed.
本文介绍一种按规则序列设计的移位型计数器。此类计数器设计方便，电路简单，译码电路简单，并具有快速自启动特性。
In this paper, it introduces one kind of shift counters designed with regular sequences. These counters have many advantages: easy to design, simple circuit, simple decode and self starting.
同时，文章对卷积编译码的理论和方法进行了较为细致的研究，并给出此设计方案的理论仿真分析。
At the same time, the thesis research the convolution coding and decoding theory in detail, as well as present the process of research on theory and simulation of this viterbi decoder.
伪随机码绝对式编码器采用M序列伪随机码作为编码方法，采用双狭缝技术进行分时位置读取，并采用ROM元件进行译码输出。
M sequence pseudorandom code is used for encoding the pseudorandom code absolute encoder, double slit technique is used to perform time sharing reading and ROM is used as the coding device.
构造一类具有伪随机序列性质的循环码，并利用良好的伪随机序列的相关特性，对循环码进行相关译码。
The cyclic code based on pseudorandom sequence, and its decoding can take advantage of the nice characteristic of pseudorandom sequence's correlation.
在此基础上分析了编码和译码程序的设计，并给出了系统的程序设计框图。
On the basis of these, analysed the coding and decoding programming, as well as giving the system design diagram.
采用耐高温的锁定型霍尔元件和钐钴永磁转子分别构成位置与速度传感器，并设计相应的速度信号倍频电路与位置信号译码电路。
Fireresistant Hall device and SmCo rotor is used to design position and speed sensor, and the corresponding doubling circuit and decoding circuit is designed.
此类计数器设计方便，电路简单，译码电路简单，并具有快速自启动特。
These counters have many advantages: easy to design, simple circuit, simple decode and self starting.
本文主要阐述了多进制ldpc码的编译码原理，并介绍了一种可简化译码的傅立叶变换译码算法。
This paper mainly expound the encoding and decoding principle of Q - ary LDPC codes, and introduce a Fourier transform decoding method with low complexity.
给出了系统结构框图及硬件电路图，并对跳码产生的原理及软件译码的过程进行了详细描述。
It also gives structure of the system and circuit of the hardware, and describes the principle of hopping code and process of the software decoding.
并详细介绍了用FPGA实现该编码方案的方法，包括BCH码的编译码和交织编码。
An FPGA implementation method of this scheme is presented, including BCH encoder and decoder and the interleaver.
介绍用LED发光二极管组成数码显示的一种编码方法，并介绍了译码驱动电路及与单片机的接口。
This paper introduces a coding method of using LEDs to constitute digital display of Numbers. The related driving circuits and their interfaces with Micro-controllers are also introduced.
最后我们还根据非多重边LDPC码性能曲线，分析其特点以及影响译码性能的参数，并通过仿真进行验证。
Finally we investigate different construnction parameters which influence the performance of the non-multi-edge LDPC codes and a simulation is given to validate.
控制部件从存储器中取出指令，并确定其类型或对之进行译码，然后将每条指令分解成一系列简单的、很小的步骤或动作。
The control unit fetches instructions from memory and determines their type or decodes them. It then breaks each instruction into a series of simple small steps or actions.
详细叙述了高位数字译码器13位DAC的工作原理，并对可变增益放大器作了理论分析。
The principle of the most significant bits digital decoder-13 bits DAC is described in detail, and the gain controlled amplifier is theoretically analysed.
本文从译码方式、驱动方式、数据传输接口方式等三方面来分别比较了显示常用的方法以及常用的芯片，并通过表格对常用芯片的功能进行了比较说明。
This paper introduced three modes to compare the display, Decoder, driver and data transmit. And particularize some IC in common use. And compare those. IC by a form.
设计了通过无线传输的有效数据包格式，并对电子手轮脉冲的编码与译码进行了分析。
The format of data packet by using wireless communication was designed, and the encode and decode of electro-handwheel pulse were analysed.
毫无疑问的，美国和英国非常清楚苏联很快就发现了Venona的存在，并更改了了他们的密码和密码机在1948年10月29号—译码者的“黑色星期五”。
Indeed, America and Britain were so deeply penetrated that the Russians soon found out about Venona, changing their codes and cipher machines on October 29th 1948—"Black Friday" for code-breakers.
匙孔信道的研究目前还处于初级阶段，现介绍了匙孔信道的空时格形码的编译码技术，就其性能特点做简略的分析介绍，并给出了一些结论。
The current research interests in the paper are space-time encoding techniques for keyhole channels and the performance of space-time trellis codes. And some results have been gi...
用FPGA设计并实现了标准中码长16200，码率2/3IRA码的编码器，且设计出相应的译码器结构。
The encoder of length 16200 and rate 2/3 IRA codes is designed and implemented with FPGA, and the corresponding decoder structure is designed.
提出FPGA可实现的TPC编译码模块整体设计方案，并结合现有AHA公司的AHA4501芯片，进一步对TPC译码性能进行了验证。
The overall TPC decoding module design using FPGA, combined with existing AHA4501 chip, and further verify the performance of TPC decoding.
介绍了几种主要的信道编码、译码原理 ，分析了他们的实现方法和性能 ，并对各种编码的优缺点进行了总结。
This article introduced the Channel Codes, and discussed the advantage and disadvantage of different types of Channel Codes.
介绍了几种主要的信道编码、译码原理 ，分析了他们的实现方法和性能 ，并对各种编码的优缺点进行了总结。
This article introduced the Channel Codes, and discussed the advantage and disadvantage of different types of Channel Codes.
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