论文的最后设计了EPP模式的并行通信接口，实现了pc机与FPGA之间数据加密系统的调试验证。
Finally, the parallel interface in EPP mode is designed and the whole data encryption system designing between FPGA and PC is given to carry out the verification of data encryption results.
在要求传输距离近，通信速度快的数据采集应用中，如CCD、视频数据采集，往往采用并行接口方式。
Parallel interface is usually adopted in the applications of data acquisition that need close -range data transfer and fast communication, such as CCD and video data acquisition.
电路采用可变结构帧存形式，与两片TMS320C40灵活的外部接口及强大的通信能力相结合，使系统可方便地组织成SIMD、MIMD等并行处理结构及流水处理结构；
This, combined with the flexible interface and powerful communication capability of TMS320C40 , made the system be easily configured as SIMD, MIMD parallel and pipeline structures.
该系统由dsp和FPGA相结合构成一种处理平台，多dsp通过HPI接口进行通信，实现了多dsp并行处理。
A processing platform is established by integrating DSP with FPGA, the multi-DSP communicates through HPI interface and multi-DSP parallel process is implemented.
此功能允许调试在计算机群集上运行的、通过消息传递接口(MPI)通信的并行程序。
This feature allows you to debug parallel programs that run on a cluster of computers communicating through the Message Passing Interface (MPI).
消息传递接口（MPI）是最常用的并行编程模型，而群集通信又是MPI中的重要组成部分。
Message Passing Interface (MPI) is the most commonly used parallel programming model, and collective communications is an important part of the MPI standard.
该系统实现串口通信与网络接口的转化，有限点多通道并行采集，实时显示及数据保存功能。
The system can insure the conversion between the Serial Communication and network interface, and finite samples multi-channel parallel collection, and real-time display and data conservation function.
增强型并行口接口协议解决了PC与数据采集系统间的高速双向数据通信问题。
EPP is an answer to the problem of high speed, bi directional data communication between PC and data collection and conditioning system.
以单片机为核心的各传感器接口模块并行处理各传感器信号，并通过双口存储器与上位处理器通信。
Modules with microcontrollers in the system process their signals parallelly, and communicate with host processor by dual port memory.
利用CPLD芯片实现单片机与ISA总线接口之间的高速并行通信，给出系统的总体设计方法及程序框图。
The solution of high speed communication between MCU and ISA bus is designed based on Altera CPLD.
本课题主要做了以下工作：首先设计了一套DSP—VC5402开发系统，包括计算机串行通信、HPI口与计算机并行口通信的接口电路；
The main work of design are follows: first we designed DSP-VC5402 development system include the interface of communicating with PC series port and HPI port communicating with PC parallel port;
本课题主要做了以下工作：首先设计了一套DSP—VC5402开发系统，包括计算机串行通信、HPI口与计算机并行口通信的接口电路；
The main work of design are follows: first we designed DSP-VC5402 development system include the interface of communicating with PC series port and HPI port communicating with PC parallel port;
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