同时采用并行流水线技术，提高了解码的速度。
The parallel pipeline is also adopted to enhance the decode efficiency.
数值实验结果表明交替平面数据通信策略和块流水线并行算法是有效且可扩展的。
Numerical results have shown that the alternation plane data communication strategy and block pipeline parallel method applied are effective and scalable.
RISC通过保证每一个指令的长度相等的方法避免了这个问题，使指令在并行结构中更容易被流水线操作。
RISC avoided this problem by keeping every instruction at the same length, making it easier for instructions to be pipelined in parallel.
采用流水线的工作方式，在编码和解码端均有两片DSP并行来完成编码和解码。
There are both two DSPs to accomplish the encoding and decoding with pipeline technique in the encoder and decoder.
数字信号处理(dsp)具有并行的硬件乘法器、流水线结构以及快速的片内存储器等资源，其技术广泛地应用于数字信号处理的各个领域。
DSP technologies have applied in every field of digital signal processing because of its parallel multiplier, pipeline structure and fast On-Chip memory.
本文分析了常用对称密码算法DES、3des和AES的可重构性，利用流水线、并行处理和可重构技术，提出了一种可重构体系结构。
In this paper, based on the analysis about the reconfiguration of the DES, 3des and AES, we propose a reconfigurable architecture, which combines reconfiguration technology with pipeline, par.
该处理器内存资源消耗较并行结构有所减少，运算速度较单独的SDF流水线结构有所提高。
Compared with the full parallel architecture, the memory cost of the designed processor decreases, thus the speed is higher than that of the SDF pipeline architecture.
本文的设计着重从多个层次利用并行处理技术来提高环路滤波的速度，包括流水线设计、数据流驱动控制策略以及算法并行性设计。
Our design emphasizes on using parallel processing technology from multi-level to improve speed, including pipelining design, data-flow drive strategy and algorithmic parallelism design.
通过负载平衡优化，并行绘制流水线有效实现了绘制、合成与显示的重叠。
Through load balancing optimization, parallel rendering pipeline can overlap rendering, compositing and display process.
该文从消除时钟信号冗余跳变而致的无效功耗的要求出发，提出了应用并行技术和流水线技术，实现基于RTL级的双边沿触发计数器的设计。
To erase the bootless power dissipation of the redundant leap of the clock, this paper proposes the RTL design of double edge triggered counter using parallelism and pipeline technique.
本文设计的FFT处理器采用流水线和并行处理技术，在64个时钟周期完成64点复数定点FFT运算，可以满足OFDM系统的需要。
The FFT processer adopts the pipeline and parallel technology and can complete 64 points FFT computation in 64 clocks. It is able to meet the need of OFDM system.
该设计提出了一种将常用的并行SIMD结构与流水线MISD结构相结合的新颖并行视频处理体系结构形式。
In this process, a unique parallel video processing architecture combined with SIMD and pipeline MISD is proposed. Modules within the coprocessor are designed individually.
本文描述了流水线处理机、并行处理机、多处理机以及VLSI计算机系统中存贮分配的一些问题，它们对并行计算是很重要的。
This Paper describes some problems, which are very important for parallel computation, on storage allocation for pipeline processors, parallel processors, multiprocessors and VLSI Computer systems.
本文描述了流水线处理机、并行处理机、多处理机以及VLSI计算机系统中存贮分配的一些问题，它们对并行计算是很重要的。
This Paper describes some problems, which are very important for parallel computation, on storage allocation for pipeline processors, parallel processors, multiprocessors and VLSI Compuer systems.
首先介绍了L SSIMD阵列微处理器的三种并行性：数据并行、流水线并行和指令的并行执行。
This paper firstly discusses three types of parallelism in LS SIMD array microprocessor, they are the concurrence of data, the pipelining and the operation in parallel.
提高FFT处理速度的主要途径是采用流水线结构和并行运算。
The main approaches of improving FFT processing speed include pipeline and parellel architecture.
FPGA在分布式计算、并行处理、流水线结构上有独特的优势，自然成为设计软件无线电系统的首选技术之一。
FPGA has become the first choice for designing the software radio system because of its unique advantages in distributed computing, parallel processing and pipelining.
设计主要考虑了流水线操作和并行度处理。
Pipelining and parallelism were main consideration of the design.
用分块流水线方法设计了超紧致差分格式的并行算法，进行数值实验及并行性能分析。
We examine the super compact symmetric finite difference scheme (SCSFD) and compare it with traditional difference methods and compact difference methods.
基于流水线技术和并行技术的硬件设计保证了该算法的实时实现。
Based on pipeline and parallelism technology, the processor can run in real-time.
改进了DCT变换算法，设计了并行查找表结构的乘法器，采用了流水线优化算法来解决时间并行性问题，提高了DCT模块的运算速度。
Design an multiplication based on parallel LUT (Look up Table). The problem of time parallel is resolved with pipeline optimization algorithm, the speed of DCT is accelerated.
流水线作业是实现并行处理的重要方法。
Advanced operation system is benefit to operation in assembly line.
数值实验结果表明交替平面数据通信策略和块流水线并行算法是有效且可扩展的。
This paper gives the paradigm of alternation plane data communication strategy based on split method in 3D computin.
数值实验结果表明交替平面数据通信策略和块流水线并行算法是有效且可扩展的。
This paper gives the paradigm of alternation plane data communication strategy based on split method in 3D computin.
应用推荐