首先介绍了常用并行加法器的设计方法,并在此基础上采用带进位强度的跳跃进位算法,通过逻辑综合和布局布线设计出了一个加法器。
On the basis we design an adder by the adoption of carry skip algorithm with carry strength signals and implement, through logic synthesis and layout.
首先介绍了常用并行加法器的设计方法,并在此基础上采用带进位强度的跳跃进位算法,通过逻辑综合和布局布线设计出了一个加法器。
On the basis we design an adder by the adoption of carry skip algorithm with carry strength signals and implement, through logic synthesis and layout.
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