电压放大器基于所述第一和第二电压信号之间的所检测的电压差而生成第三和第四电压信号。
A voltage amplifier generates a third and a fourth voltage signal based on a detected voltage difference between the first and second voltage signals.
每个ADC均具有宽带宽、差分采样保持模拟输入放大器，支持用户可选的各种输入范围。
Each ADC features wide bandwidth differential sample-and-hold analog input amplifiers that support a variety of user-selectable input ranges.
在带宽限制放大器电路的设计中使用了全差分运放结构，能有效抑制电路的共模噪声。
A fully differential operational amplifier is introduced in the design of wideband limiting amplifier which can restrain the common noise effectively.
根据RSDS接口规范，围绕接口接收器最小建立保持时间的性能，重点研究低摆幅差分信号放大器的设计。
According to RSDS specification and focusing on performance of the minimum setup and hold time, the design of differential signal amplifier for RSDS receiver is analyzed in detail.
每个ADC均具有宽带宽、差分采样保持模拟输入放大器，支持用户可选的各种输入范围。
Each ADC features wide bandwidth differential sample-and-hold analog input amplifiers supporting a variety of user-selectable input ranges.
详细研究几种基于集成运算放大器的差分运算电路。
Several differential operational circuits based on the operational amplifier are researched in detail.
提出了一种应用于流水线型模数转换器(adc)的增益提高型套筒式全差分跨导放大器(OTA)的设计与分析方法。
This paper describes the design and analysis of a fully differential, gain-enhanced CMOS telescopic operational transconductance amplifier (OTA) used in a pipeline analog-to-digital converter (ADC).
跨阻放大器(TIA)采用全差分结构，利用震荡反馈技术和可调节共源共栅(RGC)结构来增加其带宽。
The transimpedance amplifier (tia) takes a fully differential configuration, feedback oscillation technique, and regulated cascode (RGC) input stage for bandwidth enhancement.
探测电路由全差分运算放大器和仪表放大器组成。
Detecting circuit consists of a fully differential operational amplifier and an instrument amplifier.
可以彻底解决因电缆远距离传输造成放大器的级数多，故障率升高，网络的稳定性差的问题。
Can completely solve the long-distance transmission lines caused by the series amplifier, and the failure rate increased, the stability of the network poor.
为提高放大器的抗干扰性能，放大器电路采用共模抑制能力很强的差模输入方式。
For improving the anti-interference ability of the amplifier, the Differential Mode input with high common mode restraining technology is adopted in amplifier circuits.
提出了一种超宽带伪差分运算跨导放大器。
A pseudo differential operational transconductance amplifier is proposed in this paper.
该放大器采用全差分结构以获得高输出摆幅，利用源反馈技术改善线性度，并设计了共模反馈电路以稳定共模输出电压。
The amplifier employs fully differential structure to obtain high output voltage swing, and uses source degeneration techniques to improve the linearity.
提出了一种基于准浮栅技术的折叠差分结构，基于此结构设计，实现了超低压运算放大器。
A new folded differential pair topology based on quasi-floating gate technique is presented, and an ultra-low voltage op amp based on this structure is designed.
作为全差分微加速度计检测电路的电荷放大器，必须进行低噪声设计。
The charge amplifier for the interface circuit of full different accelerometer needs lower noise design.
放大器可以是差分互阻抗放大器，或耦合至差分输出放大器的双互阻抗放大器。
The amplifier may be either a differential trans-impedance amplifier, or a dual trans-impedance amplifier coupled to a differential output amplifier.
同时，在相同的电源电压下，BTL输出信号摆幅是半桥式放大器的2倍，因为负载是差分驱动的。
With the same supply voltage, the BTL signal output range is 2 times of Half-bridge amplifier due to the load with differential drive.
设计了一种采用增益增强技术并带有共模反馈的全差分运算放大器。
This paper discusses a fully differential operational amplifier with gain-boosting and CMFB techniques.
在电路设计中主要包括开关电容采样的全差分运放组成的采保增益电路和两相时钟控制的带预放大器的锁存比较器。
The key circuit design includes a sample-and-hold gain circuit using switched-capacitor to sample or hold the signal and a preamplifier-latch comparator using two-phase clock.
在电路设计中主要包括开关电容采样的全差分运放组成的采保增益电路和两相时钟控制的带预放大器的锁存比较器。
The key circuit design includes a sample-and-hold gain circuit using switched-capacitor to sample or hold the signal and a preamplifier-latch comparator using two-phase clock.
应用推荐