封装电路时，需要特别注意电路板的布局。
When packaging the circuit, pay special attention to the PC board's layout.
成电路制造、封装测试企业，根据企业对园区的贡献程度，在五年内给予一定补贴。
Into circuit manufacturing, packaging testing enterprises, according to the degree of contribution of enterprises to the park, within five years to give some subsidies.
散热片与集成电路封装热接触用于在工作过程中提取热量。
The heat sink is in thermal contact with the integrated circuit package to extract heat during operation.
微处理器：微型计算机的中央处理单位。封装在一枚单一集成电路薄片上。
Microprocessor: The central processing unit of a microcomputer. The microprocessor is contained on a single integrated circuit chip.
CPU包含成千上万个晶体管和逻辑电路，它们被封装在一个很小的设计空间模式，称为集成电路(IC)。
The CPU contains thousands of transistors and logic circuits packaged in a very small design known as an integrated circuit (IC).
塑封集成电路因其是非气密性封装，封装材料热膨胀系数的不同以及被粘接材料表面能低，是造成塑封电路离层或开裂的内部原因。
First of all, the internal reason for the delamination or cracking is the different CTE of the packaging materials and the low surface energy of the adhesions.
小型封装和纤薄的外形使该器件非常适合于印刷电路板区域和元件净空具有非常重要作用的应用。
The small package outline and low profile make this device ideally suited for use in applications where printed circuit board area and component headroom are at a premium.
本文叙述了高可靠大功率微波电路的封装设计及工艺研究情况。
This paper described mainly study of package design and technology for high-reliability high - power microwave circuit.
集成电路倒装芯片封装中半导体芯片及载体之间形成可靠联接所用焊料中的铅。
Lead in solders to complete a viable electrical connection between semiconductor die and carrier within integrated circuit Flip Chip packages.
通常，显微机械加工的部件和电子电路是分开制造的，然后在同一封装块内用线将它们连在一起。
More often, the micromachined part and electronics are fabricated separately and then wire bonded together in a single package.
集成电路倒装芯片封装中半导体铸模和载波器的焊料中的铅；
Lead in solders to complete a viable electrical connection between semiconductor die and carrier within integrated circuit Flip Chip packages.
集成电路技术中的一种修饰术语，表示元件体积小而且封装密度高。
In relation to an integrated circuit; a term that indicates small element size and high packing density.
在叙述点火模块厚膜电路的生产过程中系统介绍了厚膜封装工艺、相关设备、技术参数和检测方法。
This pa-per introduces thick film assembling technique, equipment, technical parameters and testing methods while narrating the manufacturing process of thick film circuits.
积体电路封装为整个半导体产业后半段制程，然而封装的型式多样化，相对的制程精准度要求也越来越高。
Integrated circuit packaging is a backend process of semiconductor industry. Due to the modeling diversification of assembly, process accuracy is required to higher quality.
将传感器与信号调节电路利用厚膜电路工艺进行混合封装，完成了传感器的一体化，实现了传感器的小型化。
Sensor and signal regulating circuit is carried out through hybrid packaging by making use of thick-film circuit technology, which realizes integration and minimization of sensor.
应用所编程序对两个封装实例提取出其等效电路网络。
Using the tailored programs. equivalent circuit netlists have been extracted for two package examples.
本文运用有限元方法对多热源条件下集成电路封装的热场进行了模拟和分析。
In this paper, the temperature distribution of a package with multiple heat resources was simulated and analyzed.
在此详细介绍了DIP - CIB模块的内部电路、半导体硅片技术、封装技术，以及如何配合专用的HVIC来实现通用变频器的小型化设计。
This paper describes the internal circuit of the DIP-CIB module, semiconductor chip technologies, package technologies and general purpose inverter design by using HVIC and the DIP-CIB module.
介绍了在集成电路制造封装中采用的激光微调、激光打孔、激光清洗、激光柔性布线和激光微焊技术。
Research progresses of laser trimming, laser drilling, laser cleaning, laser flexible routing and laser micro welding applied in the IC fabrication and packaging are given.
本文介绍了抗高过载电路的封装技术与封装材料，对抗高过载电路的封装工艺作了详尽的探讨。
The paper introduces the packaging technology and materials for the anti-high load circuit. It explores the packaging craftsmanship in details.
减少元件和电路的几何尺寸，以达到增加电路的封装密度、减少功耗和减小信号传播延迟的目的。
The reduction in size of components and circuits for increasing package density and reducing power dissipation and signal propagation delays.
在集成电路封装工艺过程中，对导电胶进行无氧化加热固化的质量直接决定了集成电路的质量和使用寿命。
During the integrated circuit packing process, the quality and service life of integrated circuit are decided directly by the quality of conductive adhesive through non-oxidation thermal curing.
本发明涉集成电路封装领域，具体地说，涉及对管脚电镀时，防止置换反应的方法。
The invention involves the integrated circuit package domain, to be specific, involves when galvanizes to the base pin, prevents the permutation reaction the method.
拥有快速反应、小型封装等特色之新型电路设计可符合电路反应情形、组件数量、缩减空间等需求。
The response of this circuit, amount of components, and space constraints demanded a new circuit design with a faster response, smaller footprint, etc.
QFN封装的微波芯片采用一种较新的封装形式，这种封装体积很小，特别适合高密度印刷电路板组装。
Quad Flat No-lead(QFN)package of microwave chip is a relatively new packaging. It offers a small size and especially fits for high density printed circuit assembly.
如果该封装波导谐振模恰好位于电路工作频率范围之内，电路与封装谐振模间的耦合将干扰电路的工作。
If the package resonant modes right within the operation frequencies range of the enclosed circuit, coupling between the circuit and these resonant cavity modes may disturb circuit operation.
本文简要描述了陶瓷外壳封装集成电路自动铝丝楔焊键合的工序检查。
This paper simply described the process inspection of automation Al wire ultrasonic wedge bonding in ceramic packaging IC.
本文分析这些参数对电路性能的影响，给出计算模型和方法，提出改进封装电性能的措施。
This paper analyses the effects of these parameters on the circuits, and provides the calculated models and methods. It presents the improvments for electric characteristics of package.
本文分析这些参数对电路性能的影响，给出计算模型和方法，提出改进封装电性能的措施。
This paper analyses the effects of these parameters on the circuits, and provides the calculated models and methods. It presents the improvments for electric characteristics of package.
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