提出了可重构密码协处理器的概念并论述了其设计原理。
The concept and design principle of reconfigurable cipher coprocessor are proposed in this paper.
密码协处理器的面积过大和速度较慢制约了公钥密码体制RSA在智能卡中的应用。
The area and speed of cryptography coprocessor impede the application of public-key cryptography RSA for smart card.
可重构密码协处理器组成与结构是指可重构密码协处理器的组成模块及其相互之间的连接网络。
The components are modules that construct the reconfigurable cipher coprocessor, and the structure is their connection network.
分组密码协处理器现已成功的应用到了广州大学信息安全技术实验室研制的PCI - FPGA密码卡中。
The block cipher coprocessor has been applied in a PCI-FPGA cipher card designed by the Information Security Technology Laboratory of Guangzhou University.
为以较小的面积代价实现RSA公钥密码算法及其他一些算法所需的求模、模加、模乘、模幂等运算，该文设计了一种可作为协处理器使用的模运算处理器。
An area efficient modular arithmetic processor was developed that is capable of performing RSA public-key cryptography and other modular arithmetic operations as a coprocessor.
为以较小的面积代价实现RSA公钥密码算法及其他一些算法所需的求模、模加、模乘、模幂等运算，该文设计了一种可作为协处理器使用的模运算处理器。
An area efficient modular arithmetic processor was developed that is capable of performing RSA public-key cryptography and other modular arithmetic operations as a coprocessor.
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