文章讨论了寄存器传输级结构对综合方法的影响，并提出使用分模块的寄存器传输级结构作为高层次综合的目标结构。
The influence of architectures on synthesis methods is discussed, and a clustered register transfer level architecture as object architecture is presented.
文章讨论了寄存器传输级结构对综合方法的影响，并提出使用分模块的寄存器传输级结构作为高层次综合的目标结构。
The influence of architectures on synthesis methods is discussed, and a clustered register transfer level architecture as object architecture is presented.
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