由于寄存器传输级(rtl)行为描述可以精确地确定数字系统的操作，所以寄存器传输级综合成为当前EDA行业的主流设计方法。
Because the behaviors of digital system can be described by register transfer level (RTL) behavior exactly, RTL synthesis becomes the mainstream design method in EDA domain.
寄存器传输级（RTL）描述是目前应用最广泛的电路设计描述形式。
The Register Transfer Level (RTL) behavioral descriptions are widely used in IC designs.
寄存器传输级(rtl)综合实现从rtl行为描述到门级结构描述的转换，是目前EDA设计行业的主流设计方法。
As the behavior of digital system can be fully described by the register transfer level (RTL) behavior descriptor, so RTL synthesis has become the mainstream design method in EDA domain.
高层次综合也叫行为级综合，其基本任务是完成数字系统行为描述到寄存器传输级（RTL）描述的转换。
The main task is translating the behavioral description of a digital system into the design of RTL(Register Transfer Level).
上述工作是为了建立一个将寄存器传输级语言描述翻译成硬件逻辑图的自动逻辑综合系统。
The above work is intended to set up an automatic logic synthesis system to translate a register transfer level language descriptions into hardware logic diagrams.
上述工作是为了建立一个将寄存器传输级语言描述翻译成硬件逻辑图的自动逻辑综合系统。
The above work is intended to set up an automatic logic synthesis system to translate a register transfer level language descriptions into hardware logic diagrams.
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