后一个是分布式缓存器，当存储空间的容量用光的时候，就需要一种可扩展的机制来存储这些数据。
The latter is a distributed cache since this is where the bulk of storage space is used up, and a scalable mechanism is needed to store the data.
缓存越大，浏览器可以存储更多的数据以供后退时快速访问。
The larger the cache, the more the browser can store for quick access when you come back to a site.
Memcached是用于存储和处理数据的RAM缓存(其核心使用libevent，也可以使用其他libevent服务器)。
Memcached is an RAM cache for storing and handling data (which USES libevent at it's core, as well as being used with other libevent servers).
如果数据或指令没有出现在高速缓存中，或者如果高速缓存线路无效的时候，CPU通过从主存储器中读数据来更新它的高速缓存。
If the data or instruction is not present in the cache, or if the cache line is invalidated, the CPU updates its cache by reading the data from the main memory.
当要在缓存中存储的数据量超过应用程序服务器系统的主存时，您就可以使用此功能。
You can use it when the amount of data to be stored in the cache exceeds the main memory of the application server systems.
通过把该数据结构的两个元素分离到两条不同的高速缓存线路，一条高速缓存线路的修改就不会导致再次从存储器读入另外一条高速缓存线路。
By separating the two elements of the structure into two different cache lines, modification of one cache line does not cause another cache line to be read in again from the memory.
如果您熟悉高速缓存，从本质上来说会话与它是相同的概念—存储数据以减少响应时间和服务器工作负载。
If you're familiar with caching, it is essentially the same concept — storing data to reduce both response time and server workload.
但大多数数据响应均已指明不存储在浏览器的缓存之内。
Most data responses, however, are already specified to not be stored within the browser cache.
这台远程缓存服务器可以被多个JCS客户端应用程序用于存储缓存数据。
The remote cached server can be used by multiple JCS client applications to store the cached data.
持续查询使得客户端应用能注册对移动存储在缓存服务器集群上的数据的查询。
Continuous querying enables client applications to register queries to express complex interest on moving data stored in the cache server cluster.
PPE用载入和存储指令访问主存储器(有效地址空间)，可以在主存储器与内容可以缓存的私有寄存器文件之间移动数据。
The PPE accesses main storage (the effective-address space) with load and store instructions that move data between main storage and a private register file, the contents of which may be cached.
这种存取方式是由处理器的L1缓存来服务的，数据会立刻被写入或读入而不会受到其它存储器或线程的影响。
Such an access is serviced by the processor's L1 cache and the data is read or written all at once; it cannot be affected halfway by other processors or threads.
它提供了在缓存器中存储数据、从缓存器中删除数据等方便机制。
It provides convenient mechanisms for storing data in the cache, getting data from the cache, removing data from the cache, and much more.
在将表单转换为HTML 时，Translator 将原来的XFDL 表单存储在文件缓存中，并将元数据存储在访问控制服务器中。
When it translates a form into HTML, the Translator stores the original XFDL form in the file cache, and metadata in the access control server.
查询优化集中于cpu密集型(CPUbound)执行路径，而全缓存数据库将仍然集中于优化取页到大容量存储器的操作，而这已不再是问题。
Query optimization focuses on CPUbound execution paths, while a fully cached database will still be preoccupied with optimizing page fetches to mass storage that are no longer an issue.
更为重要的是：可以将Derby用作存储来自服务器的数据的强大客户端缓存。
More to the point: we can use Derby as a powerful client-side cache for data from our servers.
onLine——测试浏览器是否在线(使用缓存，如果需要则加上本地数据存储)。
Navigator.onLine - check if the browser is online or not (and use cache plus local data store if required).
缓存服务器通过在数据库中存储处理过的资源解决了这个问题。
Cache Server solves that issue by storing processed assets in the persistent database for later use.
同时基于视频数据处理的需要，设计了四个具有双体存储结构的内部缓存器，由FPGA内部的嵌入式阵列块实现。
And for the request of video data processing, four inner buffers are designed, which are structured by dual body. They are realized by embedded array block in FPGA.
在基于冯诺依曼架构的计算机中（没有CPU缓存），CPU或者从存储器中读取指令或数据，或者在存储器中写入数据。
In a computer with the contrasting von Neumann architecture (and no CPU cache), the CPU can be either reading an instruction or reading/writing data fROM/to the memory.
按下快门按钮后，开始静态图像的拍摄并且在缓存器中存储由此获得的图像数据。
After a shutter button is pressed down, still-image photographing is started and image data obtained thereby is stored in a buffer memory.
该电路的设计，应用了数字视频数据信号位面分离的策略，采用了分场写入、分区读出缓存存储器的方法。
The digital video signals bit plane separation strategy is applied in the circuit design, and the sub-field writing-in and sub-area readout to the cache memory method is used.
目标处理器能够比访问系统存储器中的数据更有效率地访问高速缓存中的数据。
The target processor can access data in the cache more efficiently than it accesses data in the system memory.
当CPU下次读取相同地址时，数据将从高度缓存中而不是主存储器中传出。
The next time the CPU reads the same address, the data is transferred from the cache memory instead of from main memory.
利用多通道缓存串行口mcbsp实现SPI总线方式的数据采集，并采用两个DMA控制器实现了数据的实时传输和存储。
The use of multi-channel buffered serial port MCBSP is to achieve SPI bus (mode of) data collection, and the real-time data transmission and storage is achieved by the use of two DMA controllers.
利用多通道缓存串行口mcbsp实现SPI总线方式的数据采集，并采用两个DMA控制器实现了数据的实时传输和存储。
The use of multi-channel buffered serial port MCBSP is to achieve SPI bus (mode of) data collection, and the real-time data transmission and storage is achieved by the use of two DMA controllers.
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