地址总线被处理器用来选择在特定外设中的存储器地址或寄存器。
The address bus is used by the processor to select aspecific memory location or register within a particular peripheral.
PPE用载入和存储指令访问主存储器(有效地址空间)，可以在主存储器与内容可以缓存的私有寄存器文件之间移动数据。
The PPE accesses main storage (the effective-address space) with load and store instructions that move data between main storage and a private register file, the contents of which may be cached.
将磁心存储器读出放大器的输出选通到寄存器的触发器中的一种脉冲。
A pulse to gate the output of a core memory sense amplifier into a trigger in a register.
执行过程中的一个阶段所需的时间，在此期间，计算机从主存储器中取出指令或操作数，并将其存入控制器或运算器的寄存器中。
The part of execution in which an operand or instruction is read from main storage and written into a control unit or arithmetic unit register.
程序存储器的导址逻辑是由寄存器来实现的，这个寄存器叫程序计数器。
This program memory addressing logic is handled by a register referred to as a program counter.
之后，驾驶员命令设备来完成其工作(通过操纵其寄存器)和直接在设备传送输出数据在存储器中分配的缓冲区。
Then the driver commands the device to do its job (by manipulating its registers) and the device transfers output data directly to the allocated buffer in the memory.
在程序设计中，把数据送入存储器或工作寄存器。
In programming, to enter data into storage or working registers.
针对存储器和寄存器文件增加了EDAC检错纠错器对其读写过程进行检错和纠错。
EDAC error detector and corrector have been implemented to improve the reliability of register file and memory during read and write process.
地址总线被处理器用来选择在特定外设中的存储器地址或寄存器。
The address bus is used by the processor to select a specific memory location or register within a particular peripheral.
通过增加控制寄存器的三模冗余(TMR)设计来保证存储器操作的正确性，仿真验证了该设计的有效性和优越性。
A Triple Modular Redundancy (TMR) design for control registers is used to guarantee correct operation of a memory. Simulation results illustrate feasibility and superiority of the proposed design.
到输出的时候，只需直接追踪到正确的最初寄存器加以输出，以上过程省去了每段的回溯过程，可省去判断位元的存取和存储器模块。
When being output, the correct initial register is traced and output. The process saves the back-track process of each block, and the judging process of the access and the memory module of the bit.
在此提出了一种幸存路径存储器的新实现方法，与传统的回溯法和寄存器法相比，该方法具有存储器用量少、译码延迟小的特点。
Compared to traditional register-exchange and trace-back methods, the main advantages of this method lie in less memory and little decoding delay.
结构必须至少有32个通过寄存器和大容量高速缓冲存储器。
The architecture must have at least 32 general-purpose registers and large cache memories.
一种微控制器(1)，具有特殊功能寄存器，在运行中在内部存储器与外部存储器之间作出内部选择。
A microcontroller (1) having a special function register to internally select between internal memory and external memory on the fly.
一种改进的基于闪速EEPROM存储器的存储子系统，包括一个或多个闪存阵列，每一个都带有两个数据寄存器和一个控制器电路。
An improved flash EEPROM memory-based storage subsystem includes one or more flash memory arrays, each with a duplicity of data registers and a controller circuit.
在程序设计中，把数据送入存储器或工作寄存器。
In computer security, data left in storage after processing operations and before degaussing or rewriting has taken place.
在程序设计中，把数据送入存储器或工作寄存器。
In computer security, data left in storage after processing operations and before degaussing or rewriting has taken place.
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