这将作为外部时钟的输入端。
AD7764的采样速率、滤波器转折频率和输出字速率由外部时钟频率决定。
The external clock frequency applied to the AD7764 determines the sample rate, filter corner frequencies, and output word rate.
低功耗定时可以运行在以LSE，LSI或外部时钟驱动的情况下，包括停止模式。
The low-power timer has an independentclock and is running also in Stop mode if it is clocked by LSE, LSI or anexternal clock.
它的功能是当感应到输入电压界限时提供一个锁存开关，通过外部时钟信号完成复位。
Its function is to provide a latching switch action upon sensing an input threshold voltage, with reset accomplished by an external clock signal.
常见的始终电路设计有两种方式，一种是内部时钟方式，另一种方式为外部时钟方式。
Common always circuit design are two ways, one is internal clock way, another way to external clock way.
提出了一种无需外部时钟、可以部分抵消工艺偏差、基于标准单元的延迟环A/D变换器。
A non-clock delay-ring A/D converter is presented, which is based on standard cell library and not sensitive to process variation.
为了减少EMI，一个频率同步的引脚允许此系列的多重IC实现自同步或与外部时钟同步。
To reduce EMI, a frequency synchronization pin allows multiple ICs from the family to self-synchronize or to synchronize to an external clock.
采样速率、滤波器转折频率和输出字速率由AD7763的外部时钟频率与配置寄存器共同设置。
The sample rate, filter corner frequencies and output word rate are set by a combination of the external clock frequency and the configuration registers of the AD7763.
采样速率、滤波器转折频率和输出字速率由ad7760的外部时钟频率与配置寄存器共同设置。
The sample rate, filter corner frequencies, and output word rate are set by a combination of the external clock frequency and the configuration registers of the AD7760.
采样速率、滤波器转折频率和输出字速率由ad7762的外部时钟频率与配置寄存器共同设置。
The sample rate, filter corner frequencies and output word rate are set by a combination of the external clock frequency and the configuration registers of the AD7762.
其思想是按照外部时钟的步调在更短的时间内完成一项工作，即便要以更复杂的硬件和编程为代价也在所不惜。
The idea is to finish a job in a shorter time as measured by an external clock, even if at the cost of more hardware and programming complexity.
由于采样速率、滤波器转折频率、建立时间、群延迟和输出字速率与外部时钟频率呈比例变化关系，因此这些参数也会相应降低。
The sample rate, filter corner frequency, settling time, group delay and output word rate will be reduced also, as these are proportional to the external clock frequency.
在没有外部提示的情况下，生物体中生物节律依然能够延续，这能证明它体内有一个时钟。
The continuation of biological rhythms in an organism without external cues attests to its having an internal clock.
外部设备——例如，通用串行总线(usb)端口或系统时钟。
External devices — For instance, Universal Serial Bus (USB) ports or the system clock.
由于心理时间是人类大脑的产物，不同于由时钟和日历度量的外部时间，因此科学家们还将其称为“主观时间”。
Because mental time is a product of the human brain and differs from the external time that is measured by clocks and calendars, scientists also call this time "subjective time."
CPU电源状态程度越深，采取的电能节省措施就越多 —比如说停止处理器时钟或停止外部中断请求。
The deeper the C state, the more power saving steps are taken—steps like stopping the processor clock or stopping interrupts from coming in.
原来，当我们的内部时钟节拍加快以后，我们不但感知到外部世界的移动变慢了，我们实际上还可以记住更多的事情。
It turns out that when our internal clock is ticking faster, we don't just perceive the external world as moving slower - we can actually remember more about it.
一般情况下，这两种定时器是步调一致的。外部信号常常调节人体时钟命使之达到更为便利的24小时周期。
Normally the two timers are in step, and the external cues tend to regularise the internal clocks to the more convenient 24 hour period.
支持外部等待时钟信号延长总线周期。
特别说明了该声码器根据外部提供的同步时钟自适应地改变工作速率的方法。
Especialy realized the method of adapting to change its work rate in accordance with outward provided synchronization clock.
许多时钟电路也与电阻器和电容器一起使用作为低成本的时间组分或驱动外部输入。
Many clock circuits also work with a resistor and capacitor as low-cost timing components or can be driven from an external source.
为了测试这个，做一个外部相位锁定的双时钟源，带有两个时钟有意调节相位关系的节点。
To test for this scenario, rig up an external phase-locked dual-clock source with a knob that intentionally adjusts the phase relationship of the two clocks.
触发源包括手动(从面板按钮)、IEEE- 488总线、TriggerLink接口、内部时钟和外部触发。
Trigger sources include manual (front panel button), IEEE-488 bus, trigger Link, internal timer, and external trigger.
(增加)外部的时钟是通常的解决方案，但这要求数字源设备具有时钟输入接口。
An external clock is a common solution but it requires a digital source equipped with clock input, it exists but it is rare and specific.
(增加)外部的时钟是通常的解决方案，但这要求数字源设备具有时钟输入接口。
An external clock is a common solution but it requires a digital source equipped with clock input, it exists but it is rare and specific.
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