并通过CPU和刷新地址电路共享存储器的方法，对系统输出的校验信号的波形进行编程。
Hz. The waveform of the correcting signal outputted from the system is coded with CPU and address modification circuits sharing the same memory.
在地址转换中使用的一种硬件电路。
本文叙述了一种适用于低速数字信道的地址编码时分交换系统的新的电路方案。
A new circuit scheme for the address coded TDM switching system of low speed digital channels is discussed in this paper.
其他的地址有不必要的原语或不必要的数据，可以被删除电路感觉。
Other circuitry senses which addresses have nonessential primitives or nonessential data that can be deleted.
该数据加载和读取电路生成地址信号。
Address signals are generated by the data loading and reading circuitry.
数据采集系统触发电路、随机采样短时间产生电路、存储器地址计数器电路等相关控制电路的设计、仿真和调试；
The circuits revelent to data acquisition system such as trigger circuit, the circuit of short time generator in random sampling etc, are designed, simulated and adjusted.
其中包括地址缓冲、译码器、存储单元、灵敏放大器和输出缓冲电路。
The crucial path includes address buffer, decoder, memory unit, sense amplifier and output buffer.
提出一种用于电视监控系统的电路方案，以单通道方式传送监控点地址和前端设备各种控制信息。
A scheme applicable to TV monitoring system is presented for transmitting the addresses of the supervising points and various control information from the head-end equipment in a single channel.
设计了基于CAN总线的地址编码器，通信总站的数码显示电路，控制继电器电路，LNK501开关电源芯片电路。
Design the CAN bus address encoder, communication terminal digital display circuit, control relay circuit, LNK501 switching power supply chip circuitry.
给出了一个简洁的单片机控制电路，分析了输出地址，描述了不同类型的输出电路和输入电路；
A succinct SCM control circuit was pre-sented. Output address of the circuit was analyzed. And various input or output circuits were also described.
其中的视频同步信号生成电路以及视频图像数据地址生成电路采用了PLD器件，这样就可以很方便地去改变视频制式，也便于调试。
PLD is used to produce the video synchronization signal and the logical address of the video image. So it is very convenient to change the forms of the video and easy to debug!
本文提出了一种采用两级电路实现的地址变化探测器。与传统地址变化探测电路相比较，该设计显著提高了SRAM的抗噪声、抗干扰能力。
The SRAM use a new design of two stage address transition detector to filter out the Unwanted chip select glitches when the SRAM is asynchronously operated.
本文提出了一种采用两级电路实现的地址变化探测器。与传统地址变化探测电路相比较，该设计显著提高了SRAM的抗噪声、抗干扰能力。
The SRAM use a new design of two stage address transition detector to filter out the Unwanted chip select glitches when the SRAM is asynchronously operated.
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