论文介绍的SIM D协处理器是用于低层图像理解的16位定点嵌入式阵列处理器。
A novel16fixed point embedded SIMD array coprocessor which is used to solve low image comprehension is described in the paper.
FPGA作为协处理器完成图像的采集和预处理。
The FPGA was used as a coprocessor for image acquisition and pre-processing.
本论文基于可重构计算系统提出了针对多媒体图像处理的可重构阵列协处理器模型RAC。
Based on the reconfigurable computing system, the thesis proposes RAC, a reconfigurable array coprocessor model, targeted at multimedia image applications.
本论文基于可重构计算系统提出了针对多媒体图像处理的可重构阵列协处理器模型RAC。
Based on the reconfigurable computing system, the thesis proposes RAC, a reconfigurable array coprocessor model, targeted at multimedia image applications.
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