如何实现同步时序电路的初始化是时序电路测试中的关键问题。
How to implement the initialization for synchronous sequential circuits is a important issue.
通过两个典型例子，介绍了卡诺图应用于同步时序电路的逻辑分析和逻辑设计的方法。
With two concrete examples, this paper discusses the application of Karnaugh figure in synchronous time-sequence logic circuit's analysis and design.
通过设计实例表明，基于触发器次态方程设计同步时序电路具有一定的优点和实用意义。
Some design examples show that the design of synchronous sequential circuits based on next state equations of flip-flops is of great advantage and practical significance.
分析了MSI计数器74161的逻辑功能，它作为通用的时序部件可以实现任意同步时序电路。
The logic functions of MSI counter 74161 was analysed. It could be taken as a universal sequential module to realize any synchronous sequential circuits.
面向逻辑级描述的同步时序电路，以触发器为核的电路划分算法BWFSF将电路划分为大功能块。
BWFSF algorithm partition synchronous sequential circuit to many big function blocks by backward width-first search with fli.
从工程应用的角度出发，同步时序电路故障模拟采用单测试码故障并行的模拟结果更能反映实际情况。
Presented and implemented in this paper is a fanout source based fault parallelism fault simulator for synchronous sequential circuits.
介绍了一个针对同步时序电路VHDL设计的性质验证的解决方案——一个有效的符号模型判别器veris。
A solution for property verification of synchronous VHDL design is introduced, and VERIS an efficient symbolic model checker is implemented.
对异步时序电路的分析和使用是一个比较困难的问题，所以，异步时序电路的实际应用范围远不如同步时序电路。
It is rather difficult to analyze and make use of asynchronous sequential circuits, so the application of asynchronous sequential circuits is much narrower than synchronous ones.
提出了一种改进时序重排算法，使时序重排可以更有效地与其他组合优化算法结合起来，共同提高同步时序电路的速度。
This paper proposed a new algorithm of retiming which can be combined well with other combinational optimization methods to speed up logic circuits.
本文在同步时序电路故障模拟器—HOPE的基础上，率先对基于蚂蚁算法的时序电路测试矢量生成方法作了系统的开拓性研究。
Base on the existing synchronous sequential circuits fault simulator-HOPE, the test vector generation method of sequential circuits based on ant algorithm is systematically researched firstly.
基于无复位时序电路，详细研究了有复位状态的同步电路测试生成问题及在无复位电路中的应用。
In order to test the circuits that has not any reset state, special way for resolving start state is described.
基于无复位时序电路，详细研究了有复位状态的同步电路测试生成问题及在无复位电路中的应用。
In order to test the circuits that has not any reset state, special way for resolving start state is described.
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