介绍了一种新型单道，将超大规模可编程集成电路FPGA和一种新的方法相结合，对脉冲幅度甄别的输出信号直接进行处理。
A novel SPHA comprised by FPGA and a signal processing method that can avoid the error output of traditional SPHA is introduced in this paper.
Gaisler公司开辟欧洲市场已取得显著成效，并有着成熟的用于微处理器、专用集成电路和基于现场可编程门阵列开发的设计工具。
Gaisler has made significant in-roads into European markets and has in-house design facilities for microprocessor, ASIC and field programmable gate array (FPGA) -based designs.
由于用户现场可编程门阵列(FPGA)设计灵活，速度快，在数字专用集成电路(ASIC)设计中得到广泛的应用。
FPGA is widely used in Application Specific Integrated Circuit (ASIC) because of its design flexibility and high speed.
典型的机电一体化元、部件有：电力电子器件及装置、可编程序控制器、模糊控制器、微型电机、传感器、专用集成电路、伺服机构等。
Typical electromechanical integration yuan, components are: power electronic devices and devices, programmable logic controller, fuzzy controller, micro-motors, sensors, ASIC, servo institutions.
提出一款基于大规模可编程逻辑器件设计的具有多种功能的电力电子设备通用脉冲发生专用集成电路(ASIC)。
This paper presents a general pulse generator application specific integrated circuit (ASIC) for power electronics devices designed with the large-scale programmable logic devices.
集成电路。低功耗可编程运算放大器。
Integrated circuit. Low power programmable operational amplifier.
复杂可编程逻辑器件(CPLD)是目前应用最为广泛的可编程专用集成电路(ASIC)之一，特别适合于数字系统的设计和开发。
Complex Programmable Logic Device (CPLD) is one of Application Specific Integrated Circuit (ASIC) that has been widely used, especially adapt to design digital system.
媒体处理系统结构根据其实现方式的不同，可划分为两种体系结构：专用集成电路媒体处理系统芯片和可编程媒体处理系统芯片。
The architecture of media processing SoC could be failed into two classes based on its implementation method: ASIC's and programmable ones.
可编程逻辑器件集成电路包含被按可编程核心逻辑电源电压供电的可编程核心逻辑。
The programmable logic device integrated circuits contain programmable core logic powered at a programmable core logic power supply voltage.
对于那些能接触到可编程逻辑器件的人而言，需要的集成电路的数目大大的降低了。
For those who have access to programmable logic devices, the number of integrated circuits required can be greatly reduced.
现场可编程门阵列，涉及集成电路技术。
A field programmable gate array relates to the technology of integrated circuits.
该研究采用超小型或小型封装的可编程器件CPLD，焊接到特制的DIP封装的托座上，形成待编程的集成电路。
The study introduced the subminiature and pint-size encapsulation CPLD, which was welded to the tailor-made seat of DIP encapsulation. , and formed the integrated circuit that pending programmed.
可编程逻辑器件是一种用户根据需要而自行构造逻辑功能的数字集成电路。
The programmable logic device is an IC that could be structure function by user himself.
介绍了一种低功耗、高精度、高稳定性可编程定时器专用集成电路的设计，对其中的稳定性电路、低功耗问题进行了研究和分析。
In this paper, the design of a low-power, high-precision and high-stability programmable timer ASIC is presented. The stabilizing circuit and low-power problems are studied and analyzed.
介绍了一种低功耗、高精度、高稳定性可编程定时器专用集成电路的设计，对其中的稳定性电路、低功耗问题进行了研究和分析。
In this paper, the design of a low-power, high-precision and high-stability programmable timer ASIC is presented. The stabilizing circuit and low-power problems are studied and analyzed.
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