除杂装置的喷阀控制由可编程逻辑芯片FPGA来完成。
The programmable logic chip FPGA was used to control the nozzle.
现有的PCI总线控制器的实现方法有：采用专用芯片和可编程逻辑芯片。
Now there are two methods to realize the PCI Controller circuit, which are the special chip and the programming logic chip.
采用复杂可编程逻辑芯片CPLD和先进的EDA设计软件，实现了高性能的三相全控桥晶闸管的数字触发器。
A high performance 3-phases full controlled thyristor trigger is achieved by the complex programmable logic devices (CPLD) and the advanced EDA software.
利用高速可编程逻辑芯片CPLD，高速adc,DSP芯片和USB芯片实现数据采集，数据预处理和usb通信。
Data acquisition, data processing, and USB communication can be realized by using CPLD, high speed ADC, DSP and USB chip.
CPLD芯片具有硬件逻辑在系统可编程功能，大大提高了系统设计的灵活性。
The adoption of CPLD chip whose hardware logic can be reprogrammed in system helps to enhance the flexibility of system.
数据采集部分采用AD 7862芯片，具有高速的数据采集能力，可编程逻辑CPLD的采用，使得系统具有较强的可扩展性。
The part of data acquisition in the control system is introduced mainly, which USES high-speed data acquisition chip AD7862 and CPLD (complex programmable logic device) to make the system extended.
研究的重点是如何利用CPLD（复杂可编程逻辑器件）开发AD9854芯片的功能，产生特定的信号波形。
The focus of research here is how to exploit the chip of AD9854 based on the CPLD device to generate a specific signal waveform.
传统的数字系统通过设计线路板实现系统性能，而可编程器件是通过设计芯片内部的互联逻辑来实现系统功能。
The programmable digital devices implement the logical function by designed internal logic array block while the traditional digital systems do it by designed printed circuit block.
介绍如何利用可编程逻辑器件(CPLD)来控制ISD2590语音芯片，及其在公用电话网家电控制系统中的应用。
Discussed are how to use CPLD to control ISD2590 sound chips, and its application on consumer electronic equipment control systems in public telephone network is presented.
分析了高频地波雷达的时序要求，采用大规模可编程逻辑器件CPLD实现了专用定时芯片。
The time-sequence requirements for the radar are analysed, and a programmable timer is realized by a CPLD.
介绍了新型通信控制器的硬件设计，着重描述了通信接口部分，用复杂可编程逻辑器件CPLD解决了CAN 控制器芯片SJA 1000与AT 91RM 9200之间的时序逻辑问题。
The hardware structure is introduced, emphatically the communication interface circuit. The time sequence logic problem between CAN controller chip SJA1000 and AT91RM9200 is solved using the CPLD.
可编程逻辑器件安全性漏洞检测平台正是为了检测出逻辑芯片内可能存在的攻击后门和设计缺陷而研制的，从而确保电子设备中信息安全可靠。
This paper is aimed at detecting the backdoor attacks and design defects which might be embedded in logic chips, so as to insure the salty and creditability of the information in electronic equipment.
采用功能强大的EDA软件，结合在系统可编程技术(isp)，可以在不从电路板上拆下芯片的情况下，应用ISP技术，改变芯片的逻辑内容。
Adopting ISP and EDA technique may not only integrating circuit but also changing the logic content of the chip without dismantling it from the circuit board.
该驱动板以现场可编程逻辑门阵列为DSP与编码器、脉冲命令和功率模块等电路之间的接口，以最新的智能功率模块(IPM)作为功率输出驱动芯片。
FPGA is used as interface between the DSP and the encoder, pulse command and power module. The latest intelligent power module (IPM) is used to provide the function of power stage.
该驱动板以现场可编程逻辑门阵列为DSP与编码器、脉冲命令和功率模块等电路之间的接口，以最新的智能功率模块(IPM)作为功率输出驱动芯片。
FPGA is used as interface between the DSP and the encoder, pulse command and power module. The latest intelligent power module (IPM) is used to provide the function of power stage.
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