讨论了如何使用可编程逻辑器件设计任意组合编码波形发生器。
It is discussed how to use CPLD to design an arbitrarily combinatorial coding waveform generator in this paper.
其中现场端的设计以单片机技术为核心，控制器端的实现以可编程逻辑器件设计技术为核心。
In the field unit the core is Singlechip, and in the central controller is Programmable Logic Device.
提出一款基于大规模可编程逻辑器件设计的具有多种功能的电力电子设备通用脉冲发生专用集成电路(ASIC)。
This paper presents a general pulse generator application specific integrated circuit (ASIC) for power electronics devices designed with the large-scale programmable logic devices.
在实际的研制过程中，利用CPLD的在系统可编程（ISP）技术和基于VHDL 语言的可编程逻辑器件设计技术实现了雷达数据采集卡的控制模块。
The control module of the radar data acquisition card is implemented by using of the ISP technology of CPLD and the VHDL programming technology.
该文讨论了在合成孔径雷达实时成像处理器中，采用子孔径带通滤波成像处理方法的方位预处理的设计，构造了一种用大规模可编程逻辑器件实现方位预处理的电路结构。
This paper describes the design and realization of the azimuth preprocess in the real-time imaging processor of SAR with programmable logic device by the method of sub-aperture using band-pass filter.
硬件部分介绍了硬件整体结构，并对DSP及复杂可编程逻辑器件等部分的设计加以详细的介绍。
The whole structure of hardware and the designs based on DSP and CPLD are specially discussed in detail.
介绍了一种利用复杂可编程逻辑器件（CPLD）设计CMOS有源像素图像传感器驱动电路的方法。
A method for designing driving circuit of CMOS active-pixel image sensor by means of the complex programmable logic device (CPLD)was introduced .
VHDL非常适用于可编程逻辑器件的应用设计。
VHDL is very suitable to the design of programmable logic devices.
介绍了LED大屏幕扫描电路的设计方法，阐述了可编程逻辑器件在高速数字系统应用中的优点。
The design method of LED big screen scanning circuit is introduced, and the virtues of programmable logic device application on high-speed digital system are presented.
针对煤矿、机场等特殊工业现场，设计了一种基于复杂可编程逻辑器件(CPLD)和光模块的光纤现场总线通讯系统。
A fiber field-bus communication system based on complex programmable logic devices (CPLD) and optical transceiver was designed for some special industrial fields such as colliery and airfields.
本文分析了可编程逻辑器件出现竞争冒险的原因，介绍了在数字系统设计过程中常用的几种消除竞争冒险的措施。
This paper analyzes the reason for competition risk in PLD and many kinds of methods to avoid competition risk in digital system design are introduced.
本文在此主要通过VHDL语言，利用可编程逻辑器件作为载体来设计usb2.0的协议处理层模块。
This paper mainly talks about designing the protocol layer of USB2.0 with the programmable logical device as the carrier through the VHDL language.
介绍了一种应用直接数字频率综合器（DDS）技术，基于可编程逻辑器件（CPLD）和单片机设计的低频信号源。
According to the technology of direct digital synthesis(DDS), a kind of low frequence signal source was introduced based on the Complex Programmed Logical Device(CPLD)and Single Chip Micyoco(SCM).
采用EDA软件和FPGA可编程逻辑器件进行电子设计，以电子秒表为例，说明设计过程和方法。
This article introduces a new method of design electronic products with the EDA software and the FPGA programmable logic component.
在硬件、软件上进行了优化设计特别是采用了大规模可编程逻辑器件ISPLSI- 1032E门阵列使该系统更简洁、稳定。
Especially, the system becomes more concise and stable by use of large scale programmable logic device ISPLSI - 1032e gate array.
用数字信号处理器(dsp)和复杂可编程逻辑器件(CPLD)设计了IGBT感应加热电源控制系统。
The control system of IGBT induction heating power supply is designed based on DSP (digital signal processor) and CPLD (complex programmable logic device).
论文根据电能质量谐波监测要求和大规模可编程逻辑器件的特点，设计了一个基于可编程逻辑器件的24位浮点FFT处理模块。
Based on the demand of the power quality 's harmonic monitor and the specialty of large scale programmable logic device, this paper advances a frame of a 24-bit float point FFT module in FPGA.
提出了一种以复杂可编程逻辑器件（CPLD）和锁相环技术为核心的新型通用数字触发器，对其硬件电路和软件设计进行了详细分析。
To aim at the defect of the simulate trigger and the digital trigger with microcomputer, a new universal digital trigger based on CPLD and PLL is introduced.
介绍一种针对正、余弦旋转变压器数字转换器（RDC）模块，用复杂可编程逻辑器件（CPLD）技术实现伺服轴角编码电路设计的方案。
This paper introduces the technology scheme to design radar servo shaft encoder circuit by using CPLD on the rotary transformer and RDC module.
复杂可编程逻辑器件(CPLD)是目前应用最为广泛的可编程专用集成电路(ASIC)之一，特别适合于数字系统的设计和开发。
Complex Programmable Logic Device (CPLD) is one of Application Specific Integrated Circuit (ASIC) that has been widely used, especially adapt to design digital system.
该设计采用可编程逻辑器件，VHDL硬件描述语言为输入工具，接口简单，可靠性高，具有一定的实用价值。
The programmable logic device and VHDL is used as input tools, which have simple software interface, good reliability and practical value.
介绍多媒体公共广播系统的组成及CPLD(可编程逻辑器件)在数字系统设计中的应用，用AHDL语言描述程序设计。
This paper introduces the structure of a multimedia public broadcast system and the application of CPLD in designing a digital system, and gives a description of the program design in AHDL.
根据单元级联多电平变换器拓扑结构及其脉宽调制技术的特点，以数字信号处理器和复杂可编程逻辑器件为核心，设计了多电平变换器的控制器。
On the basis of topology of cascaded multilevel convertor and its PWM technique, designed the controller of multilevel convertor at the core of DSP and CPLD.
该设计采用可编程逻辑器件，ABEL HDL硬件描述语言为输入工具，接口简单，可靠性高，具有一定的实用价值。
The programmable logic device and ABEL-HDL is used as input tools, which have simple software interface, good reliability and practical value.
利用CPLD复杂可编程逻辑器件，结合VHDL硬件描述语言，设计了一种线阵CCD驱动时序电路。
Use CPLD and VHDL together to design the time sequence driving circuit for a kind of linear CCD.
本文详细介绍了一种以单片机和可编程逻辑器件为控制核心的设计方案，并分析了该方案的优缺点，同时给出了硬件和软件设计的结构及思路。
This paper introduces a design based on chip microcomputer and CPLD, analyzes its advantage and disadvantage in detail and gives the hardware-software design frame and thought.
论文详细讨论了基于复杂可编程逻辑器件CPLD的测距电路，说明了该电路的设计和制作。
In this paper, the ranging circuit which is based on the complicated PLD (CPLD) is introduced in detail, and how to design and make the ranging circuit is introduced too.
论文详细讨论了基于复杂可编程逻辑器件CPLD的测距电路，说明了该电路的设计和制作。
In this paper, the ranging circuit which is based on the complicated PLD (CPLD) is introduced in detail, and how to design and make the ranging circuit is introduced too.
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