设计了一种用于快速人脸识别的光学协处理器。
An optical processor for high speed human face recognition is designed.
FPGA作为协处理器完成图像的采集和预处理。
The FPGA was used as a coprocessor for image acquisition and pre-processing.
GPU是一种硬件协处理器，可加速计算机图形应用程序的计算。
A GPU is a hardware coprocessor that accelerates computations for computer graphics applications.
提出了可重构密码协处理器的概念并论述了其设计原理。
The concept and design principle of reconfigurable cipher coprocessor are proposed in this paper.
1执行了非法运算。| % 1使用数学协处理器时出错。
1performed An invalid arithmetic operation. | % 1encountered An error in its use of the math coprocessor.
文章介绍了一种新的嵌入式SIM D协处理器地址产生器。
A new address generator of the embeded SIMD coprocessor is introduced in this paper.
为了提高协处理器的性能，地址产生器中设计了新的传送路径。
In order to improve the performance of the coprocessor, a new passing way of the address generator is designed.
为了加快数据交换的速度，往往还拥有内嵌的RSA算法协处理器等。
In order to accelerate the speed of data exchange, often with embedded RSA algorithm coprocessor, and other.
在协处理器中，微程序控制器的微码控制是协处理器指令译码的控制核心。
The executing of the microcode function of the microprogram controller is very crucial to the instructions decoder in the coprocessor.
默认情况下，编译器使用协处理器的80位寄存器保存浮点计算的中间结果。
By default, the compiler USES the coprocessor's 80-bit registers to hold the intermediate results of floating-point calculations.
而AT 89 C52作为协处理器，完成系统的控制和串口飞参数据的交换。
AT89C52 is used as coprocessor to achieve the control of system and the data exchange of the flight parameters.
密码协处理器的面积过大和速度较慢制约了公钥密码体制RSA在智能卡中的应用。
The area and speed of cryptography coprocessor impede the application of public-key cryptography RSA for smart card.
论文介绍的SIM D协处理器是用于低层图像理解的16位定点嵌入式阵列处理器。
A novel16fixed point embedded SIMD array coprocessor which is used to solve low image comprehension is described in the paper.
本文重点研究了基于FPGA的实时多目标捕获模块和距离运算协处理器的设计与实现。
This dissertation's focus is on the investigation of the design and implementation of real-time multi-target capture module and distance operation coprocessor, which are implemented with FPGA.
实验结果表明，与软件执行相比，硬件CG协处理器可以获得最高5.7倍的性能加速。
The experimental results illustrate that hardware CG iterative solver can speed up about 5.7 times over the software version of the same algorithm.
本论文基于可重构计算系统提出了针对多媒体图像处理的可重构阵列协处理器模型RAC。
Based on the reconfigurable computing system, the thesis proposes RAC, a reconfigurable array coprocessor model, targeted at multimedia image applications.
印度理工大学的一开始是无晶圆厂的半导体产品供应商的数学协处理器和图形芯片组市场。
IIT began as a fabless vendor of semiconductor products for the math coprocessor and graphics chipset markets.
提出了一套基于DSP/FPGA的协处理器结构用以实现实时目标跟踪的嵌入式视觉系统。
This paper presents an embedded monocular vision system for object tracking in real time with coprocessor architecture based on DSPand FPGA.
从硬件上阐述了紧耦合策略，以及网络接口电路通过配置协处理器和较大容量存储器的策略。
In the hardware, tight coupling tactics and methods of deploying assist processor and big capacity memory in the network interface board are provided.
可重构密码协处理器组成与结构是指可重构密码协处理器的组成模块及其相互之间的连接网络。
The components are modules that construct the reconfigurable cipher coprocessor, and the structure is their connection network.
接口电路又包括与主控制器的PCI接口，与A/D转换器的接口和与协处理器的接口（HPI）。
The interface circuits include the PCI interface of the master controller, the interface of A/D converter and interface (HPI ) of the association processor.
在微程序控制器的设计中提出一种协处理器微程序控制器的设计方法，并且给出其功能验证的测试平台。
An approach of Micro program Controller design for coprocessor is put forward and a test bench is given to verify its function.
分组密码协处理器现已成功的应用到了广州大学信息安全技术实验室研制的PCI - FPGA密码卡中。
The block cipher coprocessor has been applied in a PCI-FPGA cipher card designed by the Information Security Technology Laboratory of Guangzhou University.
文章提出了一种基于网络处理器及应用层匹配查找协处理器的硬件解决方案，来实现高速网络环境的入侵检测。
This paper forwards a hardware solution based on NP and coprocessor which could be used in matching and lookup in application layer.
最后，提出了在人工智能引信复杂数据处理任务中PLD作为协处理器与DSP处理器结合使用的新的技术途径。
At last, a new technique that PLD as a coprocessor works together with DSP chip in the complex data processing of intelligent fuze is put forward.
文章以某数值协处理器的设计为例，研究了微指令格式的确定以及微程序代码的编写，并给出了编制的乘法微代码的实例。
Combined with the design of a math coprocessor, the paper dis-cusses how to determine microinstruction format and write microgram code. Multiplication code is presented as an example.
浮点加法器是协处理器的核心运算部件，是实现浮点指令各种运算的基础，其设计优化是提高浮点运算速度和精度的关键途径。
High-Speed Floating-point Adder is a critical part in the coprocessor, which is attached to the computing basis of floating-point instructions.
该硬件原型包含了从残差形成到宏块重建的变换量化全过程，其可以构成DSP的协处理器，用于完成H。 264实时编解码。
The hardware prototype is composed of the whole processes from obtaining residual error to Macro-Block reconstruction, and it can be used as a co-processor of DSP to fulfill H. 264 real-timing CODEC.
但如果市场派反对amd的协处理器计划的观点立不住脚，那会怎么样？那也正是如果AMD收购AT I成功将会出现的结局。
But what if the market-based arguments against AMD's coprocessor plans were nullified? This is exactly what would happen if AMD were to acquire ATI.
但如果市场派反对amd的协处理器计划的观点立不住脚，那会怎么样？那也正是如果AMD收购AT I成功将会出现的结局。
But what if the market-based arguments against AMD's coprocessor plans were nullified? This is exactly what would happen if AMD were to acquire ATI.
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