弱电流测量的各种应用包括电容器的漏电、弱电流半导体、光和离子束测量等。
Low current measurement applications include capacitor leakage, low current semiconductor, light, and ion beam measurements.
半导体放电管是新一代抗浪涌保护器件，极间电容是其应用到高频环境下的一个限制因素。
Semiconductor arrester is a new type of surge protection device, which, however, has a large interelectrode capacitance, thus limiting its application in high frequency systems.
本发明提供一半导体元件及制造镶嵌结构中的金属绝缘金属电容的方法。
The invention provides a semiconductor component and a method for manufacturing a metal-insulator-metal capacitor in a Mosaic structure.
运用QSPM矩阵分析，得出“剥离低压、半导体瓷介电容器，开发压敏电阻和新型军用元器件产品”的战略。
Applying QSPM matrix analysis, to get the strategy of "Peel off low voltage and semi-conductor ceramic capacitor, develop new type varistor and new type military components".
如此可有效率地利用该金属氧化物半导体，并无须另外制作电容，可节省该芯片的尺寸大小，进而降低成本。
Therefore, the metal oxide semiconductor can be used efficiently without additional manufacturing of a capacitor, and can save the chip size so as to reduce the cost.
本文描述使用以阻抗测量仪为中心的正偏电容测量系统提取金属-半导体接触界面态参数的方法。
This paper presents a forward-bias capacitance measurement system based on HP 4274AL-C-R meter for extracting the parameters of interface states of metal-semiconductor contacts.
地电流干扰主要是由于半导体器件开关动作产生的快速上升和下降的开关电压作用在对地电容上产生的位移电流形成的。
The grounding current EMI is caused by charging and discharging of the parasitic capacitances between the circuit and ground during the switching instant devices.
各部分分别基于半导体压阻效应、电阻迁移率变化、极板间电容变化为原理制作而成。
They are based on the principle of silicon piezoresistive effect, mobility change, and variable capacitance respectively.
借由使用高介电常数介电质和高功函数的铱电极，我们达成满足国际半导体技术蓝图所需求性能的高性能金属-绝缘体-金属电容。
By using the high-k TiTaO dielectric an1d the high work-function ir electrode, we have exhibited a high performance MIM capacitor that meets the ITRS roadmap requirements for analog capacitors.
本发明属于半导体器件技术领域，具体为一种高密度电荷存储的新型铁电电容器及其制作方法。
The invention belongs to the technical field of semiconductor devices, in particular to a novel ferroelectric condenser for storing high density charge and method for preparation.
第一电容器，形成于所述半导体衬底上方并且具有包括第一下部电极、第一电容器介电层和第一上部电极的层压结构；
The first and second capacitors each have a multi-layer laminated structure which includes a lower electrode, a capacitor dielectric layer and an upper electrode.
第一电容器，形成于所述半导体衬底上方并且具有包括第一下部电极、第一电容器介电层和第一上部电极的层压结构；
The first and second capacitors each have a multi-layer laminated structure which includes a lower electrode, a capacitor dielectric layer and an upper electrode.
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