然后在基极区(7)的一部分上形成包括比如发射极区的第一导电类型的第二半导体区域(8)。
Thereafter a second semiconductor region (8) of the first conductivity type, comprising, for example, an emitter region, is formed on a part of the base region (7).
该晶体管还包括第一导电类型的漏极区,该漏 极区与不同于第一半导体区的第二半导体区电连通。
The transistor also comprises a drain region of the first conductivity type and electrically communicating with a second semiconductor region that differs from the first semiconductor region.
在半导体中的源极区和漏极区可以限定晶体管栅极长度。
Source and drain regions in the semiconductor may define a transistor gate length.
本文的研究目标是实现在半导体蚀刻区通过自动化反馈控制系统来提高生产的自动化程度。
The goal of this paper is to design and implement a system that use automation feedback control solution to improve the automation integration in semiconductor Etch area.
左和右电荷存储区都具有半导体衬底上的薄氧化物层、薄氧化物层上的氮化物层和氮化物层上的绝缘氧化物层。
Both of the right and left charge storage regions having a thin oxide layer on the semiconductor substrate, a nitride layer on the thin oxide layer and an insulating oxide layer on the nitride layer.
此外,该多阶式栅极结构另包含多个掺杂浓度不同的掺杂区,设置在该多层阶梯结构下方的半导体基板中。
In addition, multilayer staircase type grid structure includes multiple doping sections with different doping densities setup in semiconductor base plate in low part of MSS.
本文研究了半导体表面空间电荷区中的深能级中心的电场增强载流子产生效应;
The field-enhanced carrier generation of deep level centers in semiconductor space charge region has been studied.
揭示了半导体表面微钠区城原子结构对其微纳区域表面和界面电子特性的影响,为认识半导体微纳区域表面和界面电子行为提供了新思路。
By using the adsorption of gas probe, we can understand the surface or interface electron character of functional semiconductor in micro-nano region in essentially from a new point of view.
第 一电极电耦接到半导体层,第二电极在邻近沟槽的底部的位置处电耦接到基区。
The first electrode is electrically coupled to the semiconductor layer and the second electrode is electrically coupled to the base region, at a location adjacent a bottom of the trench.
大中国区的成立代表意法半导体公司将加强对中国市场的长期投入,是其为在这个全球增长最快的经济区取得更大成功而迈出的关键一步。
The establishment of ST Microelectronics R&D (China) Center means ST will enhance long-investments in China market and achieve great success in this fast growing economic zone.
以及保护环布线,贯通上述第二区域的上述第一及第二主面的两面而形成于上述半导体基板,并包围上述至少一个贯通电极。
A guard ring is formed in the semiconductor substrate to penetrate the first and second principal faces, the guard ring is surrounding the penetrative electrodes.
本文用数值模拟的方法研究了浮区中热毛细对流与溶质浓度毛细对流的耦合,分析了半导体晶体的浮区生长过程中杂质的影响。
The axisymmetrie model is used to study numerically the coupling processes of the ther-mocapillary and the solutalcapillary convection in a floating zone.
所述半导体器件还包括沟槽栅极(32),其通过绝缘层(33)面对部分所述中间区。
The semiconductor device further has a trench gate (32) facing a portion of the intermediate region via an insulating layer (33).
该半导体装置的沟道区的导电性极好而不被分子间电荷迁移限制,并且可以被容易且安全地制备。
The channel region of the semiconductor device has high conductivity, unlimited by the charges movement between molecules, and easily and safety prepared.
本文介绍了电子显微术中一些较新的固体微区特性研究方法及其在半导体物理等固体物理分支学科中的应用。
In this paper, the new field of electron microscopy: micro-zone properties of so-lid state such as the optical, electric, magnetic, acoustic property and the deep energy level were shown.
该半导体器件包 括具有有源区和限定了有源区的器件隔离区的半导体衬底,以及形成于有源区上方的电阻串。
The semiconductor device includes a semiconductor substrate having an active region and a device isolation region defining the active region, and a resistor string formed over the active region.
形成在所述半导体衬底中的与所述第一导电类型相反的第二导电类型的阱区;
The semiconductor device includes a semiconductor substrate of a first conductivity type; a well region of a second conductivity type, formed in the semiconductor substrate;
形成在所述半导体衬底中的与所述第一导电类型相反的第二导电类型的阱区;
The semiconductor device includes a semiconductor substrate of a first conductivity type; a well region of a second conductivity type, formed in the semiconductor substrate;
应用推荐