LOP电路设计采用VHDL语言门级描述，已通过逻辑仿真验证，并在浮点加法器的设计中得到应用。
The LOP circuit module is described in gate level with VHDL, which has passed the logic simulation and verification. It is applied to the design of floating-point adder.
笔者现已成功地设计了1024位循环式加法器，并应用到RSA密码体系的硬件电路中，得到了较好的效果。
The authors have succeeded in devising a1024bit circular adder and it has been used in the circuit of RSA cryptosystem with a good effect.
笔者现已成功地设计了1024位循环式加法器，并应用到RSA密码体系的硬件电路中，得到了较好的效果。
The authors have succeeded in devising a1024bit circular adder and it has been used in the circuit of RSA cryptosystem with a good effect.
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