将这些信息放在前端总线中看，请求代理人让其他的处理器知道这种执行是如何影响缓存以及存储控制器(北桥)是如何运转的。
By putting this information on the FSB, the request agent lets other processors know how this transaction affects their caches, and how the memory controller (northbridge) should behave.
我第一次看前端总线的数据包的传输过程的时候，我发出了啊的大声惊叹，我希望有人能和我一起分享同样的喜悦。
The first time I saw FSB packet descriptions I had a huge “ahhh!”moment so I hope someone out there gets the same benefit.
这些操作发生在前端总线执行指令的时候。
These operations take place in the context of a transaction on the front side bus.
前端总线的执行指令通过5个方面来完成：判断，请求，探听，回复和数据。
FSB transactions go through 5 phases: arbitration, request, snoop, response, and data.
前端数据采集装置和后台上位机之间数据通信采用RS485总线，设计了RS485通信接口电路和通信协议。
The data communicating between the data sampling unit and the computer adopts RS485 fieldbus. At the same time, the communication protocols and RS485 communication interface are designed.
系统运用CMOS数字图像传感器取代模拟CCD摄像机，采用带有usb总线的PIC18 F 4550单片机来控制和传输数据，实现了视觉检测前端数据采集与传输的数字化、智能化。
CMOS digital image sensor and PIC18F4550 micro-controller with USB bus are applied to this sys - tem instead of the analog CCD camera to realize the digital acquisition and intelligent transmission.
因此，这是不可能的，我们将超过304兆赫的前端总线。
在这种情况下前端总线频率有可能提高至465兆赫。
In this case FSB frequency was possible to raise up to 465 MHz.
普通DC总线产品零件的其中一个优势是伟肯专利的使用平行的(afe)主动前端理论。
One of the advanced features of the Common DC bus components is the Vacon-patented methodology of using parallel Active Front-End (AFE) units.
对于稍小的要求，此M SI董事会是基于SIS 672芯片组，前端总线限制，支持800MHz内，但保留其他所有这套系列芯片。
For slightly lesser requirements, this MSI board is based on the SiS 672 chipset that limits FSB support to 800mhz but retains all other features of this chipset series.
对于稍小的要求，此M SI董事会是基于SIS 672芯片组，前端总线限制，支持800MHz内，但保留其他所有这套系列芯片。
For slightly lesser requirements, this MSI board is based on the SiS 672 chipset that limits FSB support to 800mhz but retains all other features of this chipset series.
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