显式冗余无助于提高电路性能,反而增加功耗,降低电路的可测试性,使电路面积增大,应予消除。
Explicit redundancy can not improve the performance, but increases power consumption, enlarges circuit area and decreases its testability, so it should be removed.
文中提出了显式冗余的队列循环优化算法,完全消除了此类冗余,从而有效地减少了生成电路的基片面积,提高了电路的可测试性。
This paper proposes a queue loop optimization algorithm to remove explicit redundancy completely which decreases the circuit area and improves the testability.
文中提出了显式冗余的队列循环优化算法,完全消除了此类冗余,从而有效地减少了生成电路的基片面积,提高了电路的可测试性。
This paper proposes a queue loop optimization algorithm to remove explicit redundancy completely which decreases the circuit area and improves the testability.
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