EDA的一个重要特征是使用硬件描述语言来完成设计。
EDA is an important feature of the use of hardware description language to complete the design.
越来越多的工程师开始使用硬件描述语言和高级综合工具进行设计。
More and More engineers gradually begin to design by using hardware description languages (HDLs) and sophisticated synthesis tools.
EDA技术的一个重要特征就是使用硬件描述语言(HDL)来完成设计文件，在电子设计领域受到了广泛的接受。
One important characteristic of the EDA is that the design documents should be completed by the HDL. And it was widely used by electronic designer now.
本文引入了电子设计自动化(EDA)技术，在EDA平台上使用硬件描述语言(VHDL)完成对硬件功能描述，使硬件设计更加灵活。
The paper introduce the technique of EDA, on it, logical function has been stigmatized by VHDL language, the design of hardware become more flexible.
VHDL作为一种IEEE标准的电路硬件描述语言，正广泛地被电子技术人员使用。
VHDL are widely used by electronic technology professional as IEEE standard circuit hardware description language.
采用有限状态机设计方法，使用VHDL硬件描述语言编程，并在EDA工具软件平台上进行了仿真和下载。
A design method by usage of finite state machine and VHDL hardware description language to develop the program is adopted, then it is simulated and downloaded on the EDA software platform.
VHDL作为一种通用的硬件描述语言，在电路设计中被广泛使用。
As a common kind of language for description of hardware, VHDL was once widely applied in circuit design.
该设备以FPGA为核心，使用VHDL硬件描述语言设计并实现了异步串行通讯、测试设备的自检、引信产品的检测等几大功能。
Based on FPGA the equipment with the functions of asynchronous serial data transfer, self-test capability, fuze product test and so on is designed and realized by VHDL program.
CDL语言是国际上广泛使用的计算机硬件描述语言。
CDL is a wide-spreading computer hardware description language.
CDL语言是国际上广泛使用的计算机硬件描述语言，CDL/MP是CDL语言的扩充。
CDL is a wide-spreading computer hardware description language. CDL/MP is an ex pausion of the CDL.
用高速的FPGA代替ECL集成电路制作了北京谱仪的主触发电路，其设计过程中使用了硬件描述语言VHDL，得到了和原电路同样的性能，但增加了灵活性。
Master Trigger Controller was made using fast FPGA instead of ECLIC. VHDL was used in its design. The same performance was obtained with increased flexibility. .
用高速的FPGA代替ECL集成电路制作了北京谱仪的主触发电路，其设计过程中使用了硬件描述语言VHDL，得到了和原电路同样的性能，但增加了灵活性。
Master Trigger Controller was made using fast FPGA instead of ECLIC. VHDL was used in its design. The same performance was obtained with increased flexibility. .
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