根据这种理论，可以推导得到最优的任意位加法器。
文中给出了用常规的MOS工艺制造二位加法器的设计原理与实验结果。
A 2-word 2-bit adder has been fabricated using conventional MOS technology. Design considerations and experimental results are...
文中给出了用常规的MOS工艺制造二位加法器的设计原理与实验结果。
A 2-word 2-bit adder has been fabricated using conventional MOS technology. Design considerations and experimental results are also given.
在本文中，我们提出8种不同的全加器电路，分别皆使用4位元链波进位加法器将其实现。
We proposed 8 kinds of full adder and all of them are realized in 4 bit ripple carry adder.
在一位数加多位数不进位加法口算中，口算时间差异主要源于运算时间差异和整合时间差异；
In the non-carry mental addition of 1-digit number and multi-digit number, mental arithmetic time differences lie in arithmetic time differences and integration time differences.
设计了4位QSERL串行进位加法器(RCA)电路，和相应的CMOS电路进行了功耗比较。
QSERL 4 bit carry ripple adder (RCA) is designed and compared with static CMOS counterpart.
每来一个时钟脉冲，N位加法器将频率控制数据m与相位寄存器输出的累加相位数据相加，并将结果送相位寄存器输入端。
Frequency controlled data (m) plus an accumulative phase data output by a phase register in an N-bit adder when a clock pulse comes, the result is sent to the input port of the phase register.
文中首先介绍了内建自测试的实现原理，在此基础上以八位行波进位加法器为例，详细介绍了组合电路内建自测试的设计过程。
The BIST of the principle of achieving is introduced first in this paper, then take the 8-bit ripple carry adder as an example, describes the design process of BIST.
另外，当 spu_add 被传递两个vectorunsignedint作为参数时，就会生成一条 a（32 位加法）指令。
For addition, spu_add, when given two vector unsigned ints as parameters, will generate the a (32-bit add) instruction.
其它的加法还包括两位乘客的床可以拼在一起，当然他们愿意的话。
"Another plus is that it allows two travelers to be seated together if they wish, " says Jacob.
本次参加法网的七个美国人中，有四位与纳达尔分在同一区，包括两位种子选手费什和奎雷。
Of the seven Americans in the draw, four are in Nadal's quarter, including both seeds, Mardy Fish and Sam Querrey.
使用二进制表示法，在每个26位串行加法器动产位的杠杆转换成一个钟摆在摆动的时钟可见符号。
Using binary notation, 26 movable bit levers inside each bit serial adder convert the swing from the pendulum into a visible notation on the clock.
这孩子会做二位数加法。
笔者现已成功地设计了1024位循环式加法器，并应用到RSA密码体系的硬件电路中，得到了较好的效果。
The authors have succeeded in devising a1024bit circular adder and it has been used in the circuit of RSA cryptosystem with a good effect.
汇编实现一位数加数，多位数加法，查找字符串，乘法。
Achieve a compilation of several augend, multi-digit addition, search strings, multiplication.
提出了一种改进进位运算的32位稀疏树加法器。
A 32-bit sparse tree adder with modified carry tree structure is proposed.
本文提出了综合评价医院工作的一种方法——指标加权百分位次累加法。
In this paper, a new comprehensive evaluation method on hospital function is put forward, which is Summing the Indexes Weighted Percentile Location (SIWPL).
本文提出了综合评价医院工作的一种方法——指标加权百分位次累加法。
In this paper, a new comprehensive evaluation method on hospital function is put forward, which is Summing the Indexes Weighted Percentile Location (SIWPL).
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