我的设计目标就是最后的芯片数一定要尽量少，更准确的说，是要让最后的电路板尽量小，因此，这些小不点的串行移位寄存器中标了。
My design goal was to have the fewest chips in the end. More correctly it was to have the smallest board space used.
这个寄存器定义了将用于数据通信的物理串行接口。
This register defines the physical serial interface which will be used for data communications.
移位寄存器是一种能以串行和并行方式输入信息的装置。
The shift register is a device in which information may enter sequentially or in parallel.
介绍了音频模拟接口芯片TLC320AD50C的原理和使用注意事项，以及TMS320 VC 5402串行口的主要特点，并且详细分析了TMS320 VC 5402控制寄存器的配置和工作过程。
The TLC320AD50C principles and main characteristic of the serial port of TMS320VC5402 are introduced and the configuration of control registers and their process of operation are analyzed.
所有内部锁存寄存器是由31位串行移位寄存器加载。
All the internal latched registers are loaded by a 31-bit shift register.
研究了串行输入，并行输出单向移位寄存器的功能。
The function of the single-direction shift register which is serial input and parallel output is mainly studied.
输出数据通过串行或并行端口从输出寄存器中存取，这可实现与现代微控制器和数字信号处理器的轻松、高速接口。
The output data is accessed from the output register through a serial or parallel port. This offers easy, high speed interfacing to modern microcontrollers and digital signal processors.
ICS1523是一种高性能可编程行同步信号发生器，它带有一个I2C串行总线接口，可以方便地对内部寄存器进行配置，能产生用户需要的同步信号。
ICS1523 is a high performance programmable line-lock clock generator with the I2C serial bus interface. User can use it to generate desired line-locked clock by programming it.
因此通过16比特N寄存器的2字节串行转换，调谐就可以实现。
Thus, tuning can be accomplished via a 2-byte serial transfer to the 16-bit N register.
串行模式控制寄存器；
采用反馈移位寄存器与逻辑门设计了三个典型的编码器电路：基于SRAA电路的串行准循环LDPC码编码器；
Three encoder circuit are designed respectively with feed shift-registers and logic gates: SRAA-based serial QC-LDPC encoder;
在串行CRC编码实现中，移位寄存器主要完成将并行输人数据转换成串行输出数据的功能，是整个设计的重要组成部分。
The shift register's function is completion of parallel data input into serial data output. The design of shift register is an important part in the realization of CRC code.
在串行CRC编码实现中，移位寄存器主要完成将并行输人数据转换成串行输出数据的功能，是整个设计的重要组成部分。
The shift register's function is completion of parallel data input into serial data output. The design of shift register is an important part in the realization of CRC code.
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