针对短时突发数据接收对位同步电路的要求，设计一种基于FPGA的硬件开环位同步电路。
A hardware electrocircuit scheme for bit synchronization are designed to met the demands of bit synchronization little paroxysmal data receiving in wireless digital system.
针对短时突发数据接收对位同步电路的要求，设计一种基于FPGA的硬件开环位同步电路。
A hardware electrocircuit scheme for bit synchronization are designed to met the demands of bit synchronization little paroxysmal data receiving in wireless digital system.
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