This modeled application of an STT-MRAM integrating the memory as cache memory and recorded a two-thirds reduction in power consumption by a standard mobile chip set carrying out standard operating functions, a result confirming that the new MRAM element has the lowest power consumption yet achieved.
Toshiba's new memory element advances the company's pioneering work in STT-MRAM and overcomes the longstanding operating trade-off by securing improved speed while reducing power consumption by 90 percent.