②数学语言学习与概念理解障碍：主要体现为日常概念的影响和语言转换能力缺乏；
Mathematics language study and concept comprehend obstacle: The main body is influence and language of daily concept to convert an ability to lack now;
此外，还有很多附加的能力——您应该考虑什么时候需要开发一个语言特性——不仅限于从模型到代码的转换。
Furthermore, there are a number of additional capabilities — ones you should consider when developing a language feature — that go beyond transformation from the model to code.
缺少了自动的转换，将我们的高级语言翻译成机器关心的零一编码的能力，我们的生产力将不会提高。
Without automated transformations, capable of translating our high-level language to the ones and zeros that the machine CARES about, our productivity will not improve.
并且我还可以增加自己运用这两种语言自由转换的能力。
And I could gain the skills of translating freely between two languages.
熟练的话轮转换技巧对学生来说是重要的交际能力之一，也是学生最终形成语言能力的基础之一。
The skills in turn-taking is one of the important interaction abilities and one of the bases for students' forming of language ability.
具备双语能力的人，他的大脑会进行语言转换，从一种语言转换为另一种语言。这会锻炼他们大脑中的控制部分，使之更加强健。
So when a bilingual speaker switches - or changes - from one language to another - this exercises the executive parts of their brain, making it stronger and fitter.
该模型采用TRIPLE语言实现，它能够方便地与RDF进行转换，并具有较强的推理能力。
And we use TRIPLE as an ontology language to set up the domain ontology model, which can be transformed to RDF easily, and has the powerful reasoning capability.
本文利用VHDL硬件描述语言设计了一种SVPWM信号发生器，该信号发生器不仅成功实现了输入时间信号到SVPWM触发信号的转换，而且具有良好的抗干扰能力。
In this paper, a SVPWM signal generator is designed with VHDL. This signal generator can transform time signal into SVPWM trigger signal successfully with good anti-jamming capability.
本文利用VHDL硬件描述语言设计了一种SVPWM信号发生器，该信号发生器不仅成功实现了输入时间信号到SVPWM触发信号的转换，而且具有良好的抗干扰能力。
In this paper, a SVPWM signal generator is designed with VHDL. This signal generator can transform time signal into SVPWM trigger signal successfully with good anti-jamming capability.
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