每个节点有其自己的处理器和内存，节点间可以互相通信。
Each node has its own processors and memory; the nodes can talk to each other.
在这种情况下，无磁盘节点是合适的，因为它们使用本地处理器和内存运行应用程序。
In this situation, diskless nodes can be preferable as they run using the local processor and memory.
集群的资产清单：固件版本、型号、序号、集群中的节点数量、处理器类型、内存。
Inventory of cluster: Firmware versions, models, serial Numbers, number of nodes in cluster, processor type, memory.
在测试环境中，每个节点有两个支持并发多线程的4核处理器，所以有16个可用的位置，可以把这两个参数设置为7。
In the testing environment, each node has two 4-core processors that support simultaneous multi-threading, so you have a total of 16 available slots and can set both parameters to 7.
另外，虽然高级模式感知处理器确实支持这些节点测试，但它们的数量很少，并且在实际操作中常常耦合了验证过程和数据处理过程。
Also, although the advanced schema-aware processors do support these node tests, they are rare and in practice usually couple the validation with data processing.
接下来，做处理器和磁盘基准测试，然后是两节点（并行）基准测试，再执行多节点（并行）基准测试。
Next, work your way up to processor and disk benchmarks, then two-node (parallel) benchmarks, then multi-node (parallel) benchmarks.
处理器访问本地节点的内存要比访问不同节点的内存快。
It is quicker for processors to gain access to memory in a local node than in different nodes.
处理器被安排在称为“节点”的较小的区域中。
如果您打算绘制大量节点(多于50个)，或者使用较大的Web页面缩略图呈现图形，确保使用千兆赫处理器和具有多个千兆字节的RAM。
If you intend to map a large number (more than 50) nodes, or rendering graphs with large Web-page thumbnails, make sure you have a gigahertz processor and multiple gigabytes of RAM.
linux_linsched . h中定义的拓扑结构定义了处理器的数量以及它们如何相互关联(映射到物理包和节点分布图)。
The topology structure, defined in linux_linsched.h, defines the number of processors and how they relate to one another (mapping to a physical package and node distance map).
该排序需要使用3800节点，并且每个节点使用2个4核的2.5Ghz处理器。
This sorting required about 3800 nodes with two quad core 2.5 Ghz processors per node.
这个处理器首先记录上报计数器，接着完成此节点关联的任务实例。
This handler first pegs the escalation counter and then completes a task instance, associated with this node.
任务节点计时器触发调用的超时处理器(清单16)。
Timeout handler (Listing 16) is invoked when a task node timer is fired.
本例中，处理器0将附属于逻辑节点0，处理器1附属于节点1，以此类推。
In this case, processor 0 is attached to logical node 0, processor 1 to node 1, and so on.
节点动作处理器和服务动作处理器相似，都是可配置的，只是使用不同的配置方法。
Similar to service action handlers, node action handlers are configurable, although they use different configuration approaches.
多个NPN240处理器可以链接到一个或多个主机，建立多节点CUDAGPU集群，峰值可达数千gflops。
Multiple NPN240s can be linked to single or multiple hosts to create multi-node CUDA GPU clusters capable of thousands of GFLOPS.
节点只是执行一个动作处理器——一个实现了or g . jbpm . graph . def . ActionHandler接口的类。
A typical Node executes an action handler - a class implementing the org.jbpm.graph.def.ActionHandler interface.
虽然与模式相关的节点测试具有以上这些优点，但是它们不能用于大部分XSLT或XQuery处理器，因为大部分处理器只提供基本功能，不支持XML模式。
Despite all of these advantages, the schema-related node tests are barely available for most XSLT or XQuery processors because the majority of processors are basic and do not support the XML schema.
End处理器等待所有的子令牌完成，然后transition到下个节点。
End handler waits until all child tokens are completed and then transitions to the next node.
on() 方法调用为节点注册一个事件处理器，以便当某些事件发生时它知道如何处理。
The socket.on() call registers an event handler with node so that it knows what to do when certain events happen.
异常处理器也是一种action处理器，当节点执行时出现异常，它将会被调用。
An exception handler is a kind of action handler, which is invoked when exception occurs during the node execution.
使用动作处理器(Action handler)：附加到任务节点的进入事件(enter event)，基于流程实例变量创建多个节点实例10。
Using Action handler, attached to a task node enter event to create multiple node instances 10, based on the process instance variables.
类神经网络的特色是由一些互相连接的处理器或节点组成。
A neural network typically consists of a number of interconnected processors, or nodes.
目前大多数LON节点只具有单一的神经元处理器，其控制能力不高。
Most LON nodes only contain a single processor of Neuron chip currently, so its control ability is not very strong.
一般来说，传感器节点由感应单元、处理器单元、数据传输单元和电源四部分组成。
Generally, sensor nodes are made of sensors units, processors units, data transmission units and power supply.
同时还利用微处理器AT89S51、CAN控制器SJA1000和CAN收发器开发了智能节点。
The intelligent node of using microchip AT89S51, CAN controller SJA1000 and the CAN transceiver are also developed.
每个存储节点包含自己的存储介质、微处理器、编制索引的能力以及管理层。
Each storage node contains its own storage medium, microprocessor, indexing capability, and management layer.
以太网节点的硬件基于ARM7内核的处理器；
The hardware architechure of ethernet node is based on ARM7 core processor;
以太网节点的硬件基于ARM7内核的处理器；
The hardware architechure of ethernet node is based on ARM7 core processor;
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