一种只具有一个输出通道的组合电路。
组合电路的故障检测问题是一个NP完全问题。
The problem of fault detection in general combinational circuits is a NP-complete problem.
并讨论了基于递归学习的组合电路等价性检验方法；
The combinational equivalence check methods based on recursive learning algorithm are discussed.
研究了组合电路中非鲁棒性路径时滞故障的测试生成算法。
The test generation algorithm for non-robust path delay fault in combinational circuits is studied.
设计实例表明，该技术对组合电路的设计具有一定的实用价值。
Practical examples show that this technique is Valuable for the design of combinational circuits to a certain extent.
在此基础上提出了基于布尔偏导数的组合电路双故障检测的新方法。
Then, a new method testing the double fault of combinational circuits based upon Boolean partial derivative is proposed.
它能把组合电路和时序电路的位级描述的设计规范表示成字级多项式。
It can translate the bit level description of the specification of combinational circuits and sequential circuits into word level polynomials.
针对特大规模组合电路和全扫描设计电路提出了一种高速测试生成方法。
This paper presents a high speed test generation method specifically for upper large scale combination circuit (ULSCC) and full scan designed circuit.
本文详细分析了组合电路中延时错误产生的原因，并提出了三种解决方法。
This paper shows that why can delays appear and puts forward three kinds of methods to solve delay errors.
完成了基本单元电路及其组合方案的优化设计并给出了组合电路的一些优化方法。
The optimizing design of basic circuit unit and combination scenarios was completed and some optimizing method of combination circuit was given .
以组合电路的满足性测试生成算法为基础，提出了控制输入跟踪算法和测试衍生算法。
The paper proposes controlling input values tracing algorithm and test derivation algorithm based on test pattern generation using satisfiability.
提出一种用于测试组合电路中延迟故障的新功能故障模型，讨论该模型的功能测试生成。
This paper propose a functional fault for delay faults in combinational circuits and describe a functional test generation procedure based on this model.
和电压表电路一样，可以使用如图1 - 11所示的组合电路来改变皮安表放大器的增益。
Picoammeter amplifier gain can be changed as in the voltmeter circuit by using the combination shown in Figure 1-11.
与只基于通用割集或专用割集的验证方法相比，该方法可以使组合电路的验证速度明显提高。
Compared with the method only using universal cut or special cut, the method can obviously improve the speed of verification for combinational circuits.
证明了在任何组合电路中，只需两个测试码便能测试出所有可能的初级输入与输出端之间的短路故障。
It is shown that any feedback bridging faults between primary inputs and the primary output in any general combinational networks can be betected by using only two test patterns.
本文在多值开关级代数理论的基础上，提出了适合于NMOS及CMOS组合电路的逻辑设计自动化算法。
On the basis of the multiple-valued switch-level algebra, this paper proposes a logic design automation algorithm for NMOS and CMOS combinational circuits.
本论文提出一快速的组合电路错误模拟器，此错误模拟器结合了并行错误模拟与临界路径追纵方法的优点。
A new combinational fault simulator, PARCRIPT, which combines the merits of the concept of the parallel fault simulation and the efficiency of the critical path tracing (CRIPT), is presented.
这种电路充分利用与电路、或电路、异或电路的功能，把一个较为复杂的判断电路，变成简单的逻辑组合电路。
The circuit makes full ues of functions of and circuit, or circuit and exclusive or circuit, which turns the more complex judging circuit into simple combinatory logic circuit.
讨论了基于二叉判决图（BDD）的组合电路等价性检验方法，并分析了等价性检验过程中的误判问题及其消除方法；
The combinational equivalence checking methods based on binary decision diagram(BDD)are dis-cussed, the false negative problem during equivalence checking and its eliminating methods are analyzed.
文中首先介绍了内建自测试的实现原理，在此基础上以八位行波进位加法器为例，详细介绍了组合电路内建自测试的设计过程。
The BIST of the principle of achieving is introduced first in this paper, then take the 8-bit ripple carry adder as an example, describes the design process of BIST.
共集-共基组合放大电路具有更好的宽带放大特性。
The CC-CE combined amplifier has the nicer wide band magnifiable characteristic.
正如诺伯特·维纳在1952年所指出的，具备各类组合变化的反馈电路，是控制和自我管理的根源。
As Norbert Wiener showed in 1952, feedback circuits, in all their combinatorial variety, are the fountainhead of control and self-governance.
为组合SOA应用程序提供了面向服务的电路板式的组装范式，重点集中于服务是什么而不是服务是如何实现的。
Provides a service-oriented, circuit-board assembly paradigm for composing SOA applications that focuses on what the services are versus how the services are implemented.
接触器还可方便地加装辅助触头组，和适当的热继电器组合，保护可能发生过负载的电路之用。
Contactor can be easily retro-fitting auxiliary contact group, and appropriate combination of thermal relay to protect the load that may have been circuits.
根据设计要求，通过本程序的运行，可获得最佳的组合逻辑电路的参数。
According to a requirement of design, the optimum parameters of combinational logic circuits can be obtained after running the program.
Peak已经开发了半导体专利技术，使单一集成电路带宽扩音器代替高功率多路器组合扩音器成为可能。
Peak has developed proprietary semiconductor technology in which a single-ide bandwidth amplifier may replace multiple high-power multiplexer-combined-amplifiers.
Peak已经开发了半导体专利技术，使单一集成电路带宽扩音器代替高功率多路器组合扩音器成为可能。
Peak has developed proprietary semiconductor technology in which a single-ide bandwidth amplifier may replace multiple high-power multiplexer-combined-amplifiers.
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