原则上，这种电路像其他逻辑电路一样工作：对多个输入进行分析并做出判断。
In principle, the circuit works like any other logic circuit: it analyzes multiple inputs and makes a decision.
电路的电源电压为3 ~18V，适用于各种类型的数字逻辑电路的逻辑电平判断。
The circuit supply voltage is 3 ~ 18 v, suitable in logic level of kinds of digital logical circuits.
CPU包含成千上万个晶体管和逻辑电路，它们被封装在一个很小的设计空间模式，称为集成电路(IC)。
The CPU contains thousands of transistors and logic circuits packaged in a very small design known as an integrated circuit (IC).
该模糊控制器电路不用cpu，全部算法由数字逻辑电路实现，具有运算速度快的特点，适合于需要高速控制的场合。
No CPU is needed for the fuzzy controller circuit. All algorithms are realized for high speed by digital logic circuits.
最后，本文提出了一种电位控制的矩阵式，N 中取1的互斥逻辑电路和电位控制的自动取样电路。
Finally, a choice of 1 out of N potential controlled mutual blocking logical circuits in the form of matrix and a potential controlled auto-sampling circuit have been recommended.
介绍用中规模数字集成电路设计组合逻辑电路的原理和方法。
In this article, the method and theory of designing composite logic circuit by using middle scale digital integrated circuits is discussed.
一种开始于1964年左右并使用逻辑电路技术组件(集成电路)的计算机。
A computer that began in about 1964 and USES logic technology component (integrated circuit).
本文采用逻辑电路实现了基于采样数据的EPLL数字锁相环算法，并在FPGA电路中实现和实验验证该设计。
Through the adoption of the logic circuits, this article will successfully actualize the EPLL, which is based on the sample data, and validate this project in FPGA.
前两个电路代表不同版本的“传感器的分歧”只是逻辑电路，而不是“好火焰”检测电路。
The previous two circuits represent different versions of the "sensor disagreement" logic circuit only, not the "good flame" detection circuit(s).
CMOS敏感器不是I2C总线电路，因此同arm连接必须有驱动电路(时序逻辑电路)。
When it connects to ARM, driving circuits (sequential logical circuits) is necessary because CMOS star sensor doesn't belong to I2C bus circuits.
事实证明，随着电路规模的增大和功能的增强，采用计算机辅助分析和设计取代传统的手工方法，是实现逻辑电路分析设计的不可缺少的重要手段。
In fact, alongside the growth of circuits scale and function, it is inexorable trend that we replace tradition manual operation by computer assistant electronic circuit analysis and design.
该模块由高速前放电路，数字逻辑电路，强度调制器驱动电路，自动增益控制电路，以及强度调制器组成。
The module is made of high speed amplifier, AGC circuit, digital logical circuit, intensity modulator drive circuit, and intensity modulator.
该逻辑电路具有判断智能，若配置译码显示器、ADC和DAC电路，就能构成高精度的控制器。
The circuit is of judgement intelligence, and can be made of high - precision controller if the decoding display device, ADC and DAC circuits ate added.
针对数字信号处理器与其他微处理器的不同之处，文中着重介绍了等待状态发生逻辑电路及数字信号处理器与外部芯片的数据接口电路。
In view of the disparity among DSP and other microprocessors, the logic circuit in waiting requisition and the data exchanging interface among DSP and external chips is offered.
介绍了无触点控制电路的构成和工作原理，给出了逻辑电路图和工作波形图。
The basic principle and the construction of contact-free control system are analysed, and its logic circuit and working waves are presented.
将CPLD应用到逻辑电路设计中，既简化了硬件电路，又节省了系统资源。
The applying of CPLD in this logic design simplifies the hardware and saves the system resources.
在工程实践中利用中规模集成电路设计组合逻辑电路需要在设计理念和方法上做一定的改进，以适应工程设计计算机化和工程实际的要求。
It needs to have new ideas and ways in design to use Mid-scale integrate circuit to improve the Combined Logical circuit in engineering to meet the requirements of computerizing engineering design.
用逻辑电路设计了失控保护电路，保证运行安全，还能实现联锁及安全自保功能。
Logical protective circuit is designed for the forklift truck safe operation and the realization of interlock and self-protection functions.
在第五学期我们学了半导体基础知识、交流放大电路、逻辑电路、模拟电路和数字电路的转换。
In the fifth semester, we learned fundamental knowledge of semiconductors, AC circuit amplifier, and the switching among logic circuit, analog circuit and digital circuit.
有效地建立和表示时序逻辑电路的状态转移关系是应用模型检查方法验证时序逻辑电路的关键技术之一。
Building the transition relation of sequential logic circuit is one of the key technologies for applying model checking method to verify the sequential logic circuit.
它由自耦变压器、数字逻辑电路和低压小继电器电路组成。
This device consists of self-coupling transfer, digital logic circuit and low voltage relay circuit.
本文将机车继电器控制电路等效为数字组合逻辑电路，建立了它的固定故障等效模型。
The electric locomotive bang-bang circuit is converted into an equivalent digitalcombinational logic circuit for setting up its stuck-at fault model.
组合逻辑电路的最大动态电流测试应在电路的原始输入端施加一个特定的测试序列才能实现。
A special testing sequence input is need for measuring maximum dyna - mic current of a combinational logic circuit.
根据组合逻辑电路的设计方法，突出用卡诺图化简逻辑表达式在并联比较型A/D转换器编码电路设计中的应用。
To stress the application of Karaugh map on designing of coding circuits in parallel-comparator ADC in terms of the design of combinational logic circuits.
该体系结构的硬件逻辑电路能够根据不同的应用需求，重新组织，构成不同的电路结构，实现不同的功能，以匹配不同的应用需求。
The logic circuit of this architecture can be reorganized to construct different circuit structures and implement different functions, so as to match different applications.
时序逻辑电路中的竞争冒险是电路设计中必须考虑到的重要方面。
The race and hazard in the sequential logic circuit is quite essential and must be considered when designing logic circuit.
介绍以中规模集成计数器为核心，结合中规模集成组合逻辑器件及少量门电路进行时序逻辑电路设计的方法。
This paper introduces one way to design scheduling logic circuit with medium-scale integrated counter at the core and based on MSI.
本文试图把时序逻辑电路和组合逻辑电路的设计，在概念上和方法上统一起来。
In this paper the writer tries to integrate the design of asynchronos counters of arbitrary carry system with the design of combinational logic circuits in concept and method.
提出了一种利用窄脉冲发生器驱动输出级，以提高电路抗噪声能力，同时保持动态电路的高速特性的多输入动态逻辑电路。
A novel circuit with a narrow pulse driving structure is proposed for enhancing the noise immunity and improving the performance of wide fan-in dynamic circuits.
提出了一种利用窄脉冲发生器驱动输出级，以提高电路抗噪声能力，同时保持动态电路的高速特性的多输入动态逻辑电路。
A novel circuit with a narrow pulse driving structure is proposed for enhancing the noise immunity and improving the performance of wide fan-in dynamic circuits.
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