AE是时序逻辑系统XYZ的一个子语言，用此语言描述程序性质有很多优点。
XYZ/AE is one sub-language of the temporal logical system XYZ. Describing program's property with XYZ/AE has superiority comparable to other temporal logical languages.
图1是一个时序图，描述框架将如何处理业务逻辑。
Figure 1 is a sequence diagram that describes how the framework will process business logic.
线性时序逻辑是一个已经确立的规则。
巴斯先生用来实现这一转化过程的工具是线性时序逻辑，一种可以表达过去和未来的详细约束的数理逻辑系统。
The tool Mr Barth is employing to effect this transition is linear temporal logic, a system of mathematical logic that can express detailed constraints on the past and the future.
饥饿的兔子是一个街机游戏，这需要一定的技巧，时序和逻辑。
Hungry Bunny is an arcade game, which requires skills, timing and logic.
时序逻辑综合是RTL综合系统设计中的一个重要部分。
Sequential logic synthesis is an important part of RTL synthesis system design.
时序逻辑电路中的竞争冒险是电路设计中必须考虑到的重要方面。
The race and hazard in the sequential logic circuit is quite essential and must be considered when designing logic circuit.
本文提出了一种高效的时序电路测试生成算法，该算法是建立在自适应算法的基础上，并使用了十七值逻辑模型。
This paper presents an efficient sequential circuit automatic test generation algorithm. The algorithm is based on self - adapting algorithm and USES a seventeen - valued logic model.
移位寄存器是用来寄存二进制数字信息，并能将存储的信息移位的时序逻辑电路。
The shift register is a sequential logical circuit, which can store and shift binary digit information.
该控制器是由多种逻辑集成器件构成的典型时序控制电路。
This controller is the typical sequential control circuit which is constituted by many kinds of logical integration component.
本文的不足之处是没有对其他模块如寄存器模块和位时序逻辑模块等进行详细的研究和设计，以后还需要做进一步的工作。
The shortcoming of the article is the lack of the detailed study and design of other modules such as the register module and bit timing logic modules. Further work needs to be done later.
对于系统中复杂且高速的逻辑控制及时序设计及其实现的阐述是论文的另一重要部分。
Also, this paper details the complex and high-speed logic control and timing schedule design.
有效地建立和表示时序逻辑电路的状态转移关系是应用模型检查方法验证时序逻辑电路的关键技术之一。
Building the transition relation of sequential logic circuit is one of the key technologies for applying model checking method to verify the sequential logic circuit.
设计计算机械工作循环的实质是协调各执行机构运动区段的逻辑关系和时序关系。
The essence of designing the work cycle is to coordinate the logic dependency among the motion sections of each mechanism.
用程序实现状态机功能，有限状态机是指输出取决于过去输入部分和当前输入部分的时序逻辑电路。
Finite state machine is refers to the output depends on the past input part and the current input portion of temporal logic circuit.
CCD驱动电路的关键部分是时序脉冲产生电路，目前国内外大都采用可编程逻辑器件来设计这部分。
The key part of the CCD drive circuit is a pulse generation circuit, for the present, which is generally achieved by employing the programmable logic devices at home and abroad.
CCD驱动电路的关键部分是时序脉冲产生电路，目前国内外大都采用可编程逻辑器件来设计这部分。
The key part of the CCD drive circuit is a pulse generation circuit, for the present, which is generally achieved by employing the programmable logic devices at home and abroad.
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