系统时钟恢复是数字电视系统设计中的难点。从研究数字电视接收系统出发，根据实际需要深入探讨并提出了一种基于缓存技术的系统时钟处理方案。
System clock recover is the key in digital TV system. The paper proposes a scheme of clock settlement based on buffer technology from researching DTV receiving system.
数据库存储过程和触发器中的处理将使用数据库时钟。
Processing moved into stored procedures and triggers within the database will use the database clock.
这些方面包括选择如何处理事件、调度、时钟同步、时间间隔计算、本地相关性和文化意义。
These aspects include choosing how to handle events, schedules, clock synchronization, interval calculations, local relevance, and cultural significance.
这是因为进程执行现在需要跨总线协调，以一半的芯片时钟频率进行处理。
This is because process execution now needs to be coordinated across the bus, which operates at half the clock frequency of the chip.
一个明显的解决方案是使用具有更快时钟频率的处理器，但是对于任何特定技术来讲都存在一个物理极限，时钟频率也有这样的极限。
An obvious solution is to use a processor with a faster clock rate, but for any given technology there exists a physical limit where the clock simply can't go any faster.
除了处理器时钟速度外，另一个重要的处理器性能度量是每条指令的时钟周期(CPI)。
In addition to processor clock speed, another important processor performance metric is clock cycles per instruction (CPI).
POWER 5微处理器使此吞吐量增加了一倍，每个时钟周期收集两组指令(每组最多有五个)，并在每个时钟周期内完成两组指令。
The POWER5 microprocessor doubles that throughput by collecting two groups of up to five instructions per clock cycle and completing two groups per clock cycle.
对双核内存测评结果不是很好，但是微处理器处理速度和时钟频率或是缓存空间相比要很好的多。
Benchmark tests are not perfect, but are a better indicator of microprocessor speed than clock rate or cache size specifications.
直至最近，这种状况都是靠提高时钟频率达到的，在我有生之年，我已看到处理器主频从几千赫兹上升至几吉赫兹。
Up until recently, this was accomplished by accelerating the clock speed, which has leaped from kilohertz to gigahertz in my lifetime.
通过在DEBUG级别启用这个日志程序，您会发现Rampart处理的各个部分所需的时钟时间。
By enabling this logger at DEBUG level, you can find out the amount of clock time required for various parts of the Rampart processing.
POWER 4微处理器每个时钟周期收集一组指令(最多有5个)，并在每个时钟周期内完成一组指令。
The POWER4 microprocessor collects a group of up to five instructions per clock cycle and can complete one group of instructions per clock cycle.
Morfic开发的最新内核能给Nexus s增加200m的时钟周期，提高处理器处理能力。
Morfic has developed a new kernal allowing owners of the Nexus s to now add an extra 200 milion clock cycles to their processing power.
如果你仅仅参照微处理器芯片的时钟速度，你可能会这么想。
If you looked only at the clock speeds of microprocessor chips, you might well think so.
处理双方请求的处理器核心的时钟速度。
Clock speed of the processor cores handling the request on both sides.
当处理器以较低的时钟速度运行时，它们消耗的电能和产生的热量也相对较少。
When processors operate at a lower clock speed, they consume proportionately less power and generate less heat.
但是时钟频率已经趋于饱和，现在计算机处理能力的提高主要靠增加处理器的数目以及提高在这些处理器之间分配任务的能力。
But computer clocks have plateaued and now, advances in computing power are coming from increases in the number of processors and improved abilities to distribute a problem across them.
尽管不同处理器架构间的时钟速度没有可比性，但是它使得安腾处于劣势。
While clock speeds cannot be directly compared between different processor architectures, it does make the Itanium look bad.
多年来，处理器制造厂商在不断提高时钟速度和指令级并行性，因此单线程代码不需要修改就可在新的处理器上更快运行。
For years, processor makers consistently delivered increases in clock rates and instruction-level parallelism, so that single-threaded code executed faster on newer processors with no modification.
有一点需要注意：如果没有CPU任何活动，某些处理器会降低时钟频率。
It should be noted that some processors will step down clock speeds if there is no activity on the CPU.
RTSJ 处理了几个有问题的地方，包括调度、内存管理、线程、同步、计时、时钟和异步事件处理。
The RTSJ addresses several problematic areas, including scheduling, memory management, threading, synchronization, time, clocks, and asynchronous event handling.
这些系列的处理器都拥有不同的时钟频率，或者说处理器处理交给它们的指令或任务的速度。
All of those come in varying clockspeeds, or how fast a chip will perform the instructions or tasks it's given.
现在的ARM处理器需要消耗20 + 4.3N个时钟周期，这是一个非常费时的操作，要尽可能的避免。
The current version takes about 20 + 4.3n cycles for an ARM processor. As an expensive operation, it is desirable to avoid it where possible.
顾名思义，此调控器的目标的通过将处理器时钟速度设置为最大级别而实现最大的系统性能。
As the name implies, this governor's goal is to get the maximum performance out of a system by setting the processor clock speed to the maximum level and leaving it there.
就像英特尔的超高时钟频率不能在提升了，双核内存也不能让微处理器的功能增大一倍。
Just like Intel's super high clock rates don't translate into proportionately more performance, doubling of cache size certainly doesn't double the performance of a microprocessor.
CPU电源状态程度越深，采取的电能节省措施就越多 —比如说停止处理器时钟或停止外部中断请求。
The deeper the C state, the more power saving steps are taken—steps like stopping the processor clock or stopping interrupts from coming in.
为了将向时钟添加一些花样，可以使用background和fill函数处理背景和时钟的颜色。
To add some variety to your clock, manipulate the colors of the background and clock using background and fill functions.
暂停（Stall） ——处理器不开始执行新指令处的时钟周期。
Stall -- A clock cycle where the processor does not begin a new instruction.
高频时钟可支持更高的取样率，从而达到更高的精确度和更快的信号处理能力。
The high frequency clock allows for a greater sampling rate, which results in higher accuracy and faster signal processing capability .
高频时钟可支持更高的取样率，从而达到更高的精确度和更快的信号处理能力。
The high frequency clock allows for a greater sampling rate, which results in higher accuracy and faster signal processing capability .
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