电致融合仪主要由高频交流场、高压窄脉冲发生器以及控制逻辑单元组成。
The cell fusion instrument consists of high frequency generator, high amplitude pulse generator and sequence control logic unit.
控制器命令然后使用任务命令来执行单元业务逻辑。
The controller command in turn USES the task commands to implement the unit business logic.
注意：理想情况下，可以将数据访问逻辑分隔到它自己的部署单元中并且保持控制器没有被混杂。
NOTE: Ideally, you could separate the data access logic into its own deployment unit and keep the controller pure.
计算机中，解释并执行指令的一种功能单元。注：处理器至少包含有一个指令控制器和一个算术与逻辑运算器。
In a computer, a functional unit that interprets and executes instructions. Note: a processor consists of at least an instruction control unit and an arithmetic and logic unit.
另外，精心设计了微控制器的核心部件算术逻辑单元。
Additionally, we exactly designed the central process department: Arithmetic Logic Unit.
介绍了造纸配浆工段的工艺流程、测控系统、以可编程逻辑控制器（PLC）为控制单元的系统结构和硬件设计，同时详细阐述了实现连续配浆的控制算法。
The paper introduces the process of continuous furnish preparation, its measuring and controlling systems, the structure and hardware design of the whole system where the PLC is used as control unit.
电力机车逻辑控制单元(LCU)是一种用微机和电力电子器件构成的新型无触点控制装置。
Logic control unit (LCU) for electric locomotive is a new type of contactless control equipment combining microcomputer and power electronic devices.
电力机车逻辑控制单元(LCU)是一种用微机和电力电子器件构成的新型无触点控制装置。
Logic control unit (LCU) for electric locomotive is new type of contactless control equipment combining microcomputer and power electronic devices.
通过提前产生求值完成信号，使用DSDCVS逻辑实现可重构单元的运算电路，改进了异步可重构单元的控制电路。
By producing evaluating completion signal early and using DSDCVS logic to design computation circuit of reconfigurable cell, a modified control circuit is proposed.
介绍了一种以dsp为核心的图像系统中，以FPGA为数据采集逻辑控制单元，用DSP控制实现了黑白全电视信号图象数据采集。
In imaging system, FPGA is used as a main logic unit, and DSP control to realize the data acquisition for black-white video signal. The principal of imaging system is introduced.
总体分为两部分：数字控制逻辑电路和模拟宏单元电路。
They are divided into two parts: digital control logic circuits and analog macro circuits.
论文是基于机车控制系统的子系统“机车逻辑控制单元”和“机车分布式微机控制柜”的开发研究展开的。
The paper is based on research and development of locomotive logic control unit and locomotive distributed microprocessor control system, which are subsystems of locomotive control system.
控制器的逻辑单元为多cpu网络体系，体系内各智能化功能模块通过CAN总线互联，实现模块间的数据交换和多cpu协同工作。
The logic elements in controller are multiple CPU network setup. Individual intelligent functional modules are interconnected by CAN bus for data exchanging and multiple CPU cooperating.
介绍了一种以dsp为核心的图像系统中，以FPGA为数据采集逻辑控制单元，用DSP控制实现了黑白全电视信号图象数据采集。
In imaging system, FPGA is used as a main logic unit, and DSP control to realize the data acquisition for black-white video signal.
具有实用、可靠、先进的分布式逻辑控制单元实现了在韶山3B型电力机车上装车运行考核。
Running and examining the electric locomotive distributed logic control with mounting on SS3B electric locomotive.
每个单元功能设计成允许装配一个由逻辑程序控制器控制的拥有高度友好用户界面的控制面板。
The functional design of each unit allows it to be equipped with a control panel using a programmable logic controller with an operator interface for a highly user-friendly operation.
第四章结合实际控制系统信号，阐明ss3b型电力机车逻辑控制单元显示系统的结构和实现要点。
Theforth part of this theme make it clear the structure and specialty of the display unit of SS3B-LCU according to the virtual system control signal.
一种网络服务请求单元，由系统服务控制点(SSCP)送到逻辑单元(LU)，通知该逻辑单元所请求过程的状态。
A network services request unit that is sent by a system services control point (SSCP) to a logical unit (LU) to inform the LU of the status of a procedure requested by the LU.
例如，您肯定希望能为应用系统中的所有控制器逻辑和验证逻辑创建单元测试。
For example, you definitely do want to build unit tests for all of the controller logic and all of the validation logic in your application.
逻辑控制电路由CPLD完成，主要完成整个处理单元的时序和逻辑控制。
Logical control circuit is implemented by CPLD, and its main function is the whole units time sequence and logical control.
根据控制逻辑来实施所述相位选择单元(psu)。
Said phase selection unit (PSU) is implemented based on direct logic.
本文研究设计了基于多功能车辆总线的机车逻辑控制单元，讨论了列车通信网络实时协议的实现。
This dissertation researched and designed the locomotive LCU based on MVB, discussed the realization of real-time protocol of TCN.
对实时红外atr系统的FPGA逻辑结构进行了研究，提出了一种以寄存器单元为控制核心的FPGA逻辑结构。
A logic structure of FPGA with registers unit as control kernel is proposed after studying the logic structure of FPGA of real time IR ATR system.
处理器包含一个时钟，一条指令控制单元，一个算术和逻辑单元，并登记。
The processor contains a clock, an instruction control unit, an arithmetic and logic unit, and registers.
根据单元级联多电平变换器拓扑结构及其脉宽调制技术的特点，以数字信号处理器和复杂可编程逻辑器件为核心，设计了多电平变换器的控制器。
On the basis of topology of cascaded multilevel convertor and its PWM technique, designed the controller of multilevel convertor at the core of DSP and CPLD.
根据单元级联多电平变换器拓扑结构及其脉宽调制技术的特点，以数字信号处理器和复杂可编程逻辑器件为核心，设计了多电平变换器的控制器。
On the basis of topology of cascaded multilevel convertor and its PWM technique, designed the controller of multilevel convertor at the core of DSP and CPLD.
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