该算法适合于并行的译码结构，能够在保持译码性能不变的同时，加快译码速度。
The proposed algorithm is applicable to the parallel decoding structure and can improve the decoding speed meanwhile keeping the decoding performance unchanged.
采用了一种可以避免求逆运算的修正BM迭代算法，并且利用这样的迭代算法和基于弱对偶基的比特并行乘法器构成了广泛应用的RS码的译码器。
By selecting the bit parallel multiplier based on WDB and the modified BM iterative algorithm that can avoid inversion, the widely used rs decoder is constructed.
由于采用迭代译码算法，而且是并行算法，因此能提高译码速度，降低译码的复杂度。
As a result of using the iterative decoding algorithm, which is a parallel algorithm, it can improve the decoding speed and reduce the complexity of decoding.
本译码器采用改进的最小和译码算法及符合CMMB标准要求的部分并行译码器结构。
The decoder employs the Normalized MSA algorithm, and Partially Parallel structure for LDPC code in CMMB standard.
本译码器采用改进的最小和译码算法及符合CMMB标准要求的部分并行译码器结构。
The decoder employs the Normalized MSA algorithm, and Partially Parallel structure for LDPC code in CMMB standard.
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