图6是非易失性存储器阵列的框图。
快闪存储器集成电路包含多个快闪存储器阵列。
A flash memory integrated circuit includes a plurality of flash memory arrays.
NROM存储器元件，存储器阵列，相关装置和方法。
NROM memory cell, memory array, related devices and methods.
控制电路在预定的存储器周期的开始时刻读出存储器阵列中的数据。
The control circuitry senses data within the memory array at a beginning of a predetermined memory cycle.
本发明公开了一种位于基底上的电阻式存储器单元和电阻式存储器阵列。
The invention is directed to a resistive memory cell on a substrate and a resistive memory array.
设备的一些实施例涉及采用高密度类NOR存储器装置的类NAND存储器阵列。
Some embodiments of the apparatus relate to NAND-like memory arrays employing high- density NOR-like memory devices.
趋势是将系统的存储器阵列和控制器电路一起集成在一个或一个以上集成电路芯片上。
The trend is to integrate the memory arrays and controller circuits of a system together on one or more integrated circuit chips.
在并入了存储器阵列的特定实施例中，仅需要在整个存储器阵列上对一个关键模拟节点走线。
In certain embodiments incorporating a memory array, only one critical analog node must be routed throughout the memory array.
所述图像传感器具有用于控制所述传感器与存储器阵列之间的数据转移的集成式存储器控制器。
The image sensor has an integrated memory controller for controlling transfers of data between the sensor and the memory array.
控制器218通常含有缓冲存储器以用于将用户数据写入到存储器阵列或从存储器阵列读取用户数据。
Controller 218 typically contains buffer memory for the user data being written to, or read from, the memory array.
所述存储器装置包括M个正规字线驱动器、虚设字线驱动器、存储器阵列、N个读出放大器和时序控制电路。
The memory device includes M normal word line drivers, a dummy word line driver, a memory array, N sense amplifiers, and a timing control circuit.
与传统的全功能EEPROM相比，利用快闪存储器，整个存储器阵列或存储器的一部分的内容可在一个步骤中擦除。
With flash memory, also a type of EEPROM, the contents of the whole memory array, or of a portion of the memory, can be erased in one step, in contrast to the traditional, full-featured EEPROM.
在一些实施例中，存储器装置包括用于提供读数据位的存储器阵列和用于生成与读数据位对应的CRC位的循环冗余码(CRC)生成器。
In some embodiments, a memory device includes a memory array to provide read data bits and a cyclic redundancy code (CRC) generator to generate CRC bits corresponding to the read data bits.
对于主动/被动存储器RAID阵列，任何时候，您的主机只能通过其中一条路径到达该阵列的一个LUN。
For an active/passive storage RAID array, your host can only reach one single LUN from this array by one of these two paths at any time.
例如，存储器电路515可在现场可编程门阵列中存储配置位，其中一个配置位用于生成选择信号。
For example, memory circuit 515 can store configuration bits in a field programmable gate array, where one of the configuration bits is used to generate the select signal.
在各种设计中，图5中除存储器元件阵列202以外的组件中的一者或一者以上可视为管理电路。
In various designs, one or more of the components of FIG. 5, other than memory element array 202, can be thought of as a managing circuit.
所述存储器阵列包括M行和N列存储器单元以及列虚设单元。
The memory array includes M rows and N columns of memory cells and a column of dummy cells.
本发明公开了存储器单元阵列，以多行与多列排列。
The invention discloses a memory cell array arranged multiple in rows and lines.
一种电荷陷获非易失存储器单元的阵列，排列为多列单元，且每一列为串联安排，如NAND串。
An array of charge trapping nonvolatile memory cells is arranged in several columns of cells, each arranged in a series, such as a NAND string.
硬盘存储器的组成、原理与性能指标，活动硬盘，磁盘阵列；
The composition of hard disk memory, principle and function index, mobile hard disk, disk array;
一种改进的基于闪速EEPROM存储器的存储子系统，包括一个或多个闪存阵列，每一个都带有两个数据寄存器和一个控制器电路。
An improved flash EEPROM memory-based storage subsystem includes one or more flash memory arrays, each with a duplicity of data registers and a controller circuit.
数据在物理存储器上进行了交织存放以支持行阵列和列阵列的同时访问。
Data are interleaved in the memory in order to support both horizontal and vertical array access.
铁电阵列在红外探测器、非挥发性存储器中具有重要应用。
Ferroelectric arrays have promising applications in the infrared detectors and non-volatile ferroelectric memories.
设计了一种新型的存储器结构单元———锗/硅双层量子点阵列浮栅结构纳米存储器。
The charge storage characteristic of Ge/Si double-layer quantum-dots floating-gate nano-memory was investigated.
设计了一种新型的存储器结构单元———锗/硅双层量子点阵列浮栅结构纳米存储器。
The charge storage characteristic of Ge/Si double-layer quantum-dots floating-gate nano-memory was investigated.
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