本发明提供一种多芯片封装。该多芯片封装包括多个存储芯片和控制芯片。
The present invention provides a multichip package, including a plurality of storage chips and control chips.
文章评述多芯片封装技术及目前的基本情况，这一技术在手机存储器的应用现状等。
Multi-chip packaging ( MCP ) technologies and their basi status, state-of-art of applications for mobile phone memory are reviewed in this paper.
同时，列举了当前主要的工艺特征与技术要点，从而说明多芯片封装的技术及其发展前景。
The main and important technological points of MCP are also listed and so that the technological superiority and the developmental prospects of these new package technologies are shown.
图案化金属层位于绝缘层上并填入于导通孔中，以作为本实用新型多芯片封装结构的内连线层。
The pattern metal layer is arranged on the insulation layer and filled into the diversion holes, thereby being an inner linking layer of the multi-chip packaging structure of the utility model.
三星电子公司，是全球领先的半导体和电信制定了一个4gb的多芯片封装(MCP)针对3g手机市场。
Samsung Electronics, a global leader in semiconductor and telecommunication has developed a 4gb multi-chip package (MCP) targeted at 3g mobile phones market.
本实用新型公开一种多芯片封装结构，至少包括一承载器、至少一封装模块、一绝缘层及一图案化金属层。
The utility model discloses a multi-chip packaging structure comprising at least a loader, at least a packaging module, an insulation layer and a pattern metal layer.
本文将主要讨论现阶段一般的封装失效分析的技术与设备，并且重点研究失效分析技术在多芯片封装领域的应用。
In this thesis, the application of the failure analysis in MCP package technology will be addressed along with some general fa instrument and methods.
COF是一种高性能、多芯片封装工艺技术，在此封装中把芯片包入模塑塑料基板中，通过在元器件上形成的薄膜结构构成互连。
COF is a high performance, multichip packaging technology in which dies are encased in a molded plastic substrate and interconnects are made via a thin-film structure formed over the components.
介绍了微电子镀覆在半导体和IC封装、凸点制作、多芯片组件以及微电子机械系统中的应用。
This article describes the application of microelectronic plating in manufacture of semiconductor, IC packaging, micro-bumps, multichip modules and microelectronics mechanical systems.
在3d -MCM(多芯片组件)封装设计中，大功率和高热流密度导致系统的散热成为关键技术之一。
In 3d-mcm (multi chip module) packaging designs, heat dissipation is one of the key issues that must be solved.
垂直通孔互连是微波多芯片组件封装工艺和理论分析的基础，开展垂直通孔互连的研究有着现实的意义。
Because vertical via interconnect is the base of theoretical analysis and package technics of MMCM, further study on vertical via interconnect is very vital and instructive to reality.
多芯片模块现在采用的有机层压板(MCM - L)、陶瓷(MCM - C)和沉积薄膜(MCM - D)的封装技术。
Currently, MCM is classified as laminated multichip module (MCM-L), ceramic multichip module (MCM-C) and multichip module made by deposited thin film (MCM-D) packaging technologies.
简要介绍为满足日益增长的低功耗、轻重量、小体积系统的应用需求而涌现出的多种裸芯片封装与多芯片叠层封装技术。
This paper introduces a number of bare and multichip module stacking technologies that are emerging to meet the ever increasing demands for low power consumption, low weight and compact systems.
阐述了MEMS的主要封装工艺和技术，包括圆片级封装、单芯片封装、多芯片组件和3d堆叠式封装等。
Moreover, some major processes package of MEMS, including wafer-level packaging, single-chip packaging, multi-chip packaging and stacked 3d packaging, etc were discussed.
多核cpu架构与多cpu架构并无太大区别，只是将芯片封装的更紧密，成本更低而已。
Framework of much nucleus CPU and much CPU framework do not have too big distinction, what just enclose chip is more close together, cost is lower just.
多核cpu架构与多cpu架构并无太大区别，只是将芯片封装的更紧密，成本更低而已。
Framework of much nucleus CPU and much CPU framework do not have too big distinction, what just enclose chip is more close together, cost is lower just.
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