采用复杂可编程逻辑芯片CPLD和先进的EDA设计软件，实现了高性能的三相全控桥晶闸管的数字触发器。
A high performance 3-phases full controlled thyristor trigger is achieved by the complex programmable logic devices (CPLD) and the advanced EDA software.
研究的重点是如何利用CPLD（复杂可编程逻辑器件）开发AD9854芯片的功能，产生特定的信号波形。
The focus of research here is how to exploit the chip of AD9854 based on the CPLD device to generate a specific signal waveform.
介绍了新型通信控制器的硬件设计，着重描述了通信接口部分，用复杂可编程逻辑器件CPLD解决了CAN 控制器芯片SJA 1000与AT 91RM 9200之间的时序逻辑问题。
The hardware structure is introduced, emphatically the communication interface circuit. The time sequence logic problem between CAN controller chip SJA1000 and AT91RM9200 is solved using the CPLD.
介绍了新型通信控制器的硬件设计，着重描述了通信接口部分，用复杂可编程逻辑器件CPLD解决了CAN 控制器芯片SJA 1000与AT 91RM 9200之间的时序逻辑问题。
The hardware structure is introduced, emphatically the communication interface circuit. The time sequence logic problem between CAN controller chip SJA1000 and AT91RM9200 is solved using the CPLD.
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