芯片上L 3目录和内存控制器。
芯片上集成内存控制器。
集成内存控制器的K8是杀手的建筑，它表明了最好的考验。
The integrated memory controller is a trump of K8 architecture, and it shows its best in this test.
此外，整合的内存控制器将支持只有两个频道解甲还乡- 3而不是三天。
In addition, the integrated memory controller will support only two channel DDR-3 instead of three.
DDR2内存不能直接识别主端口的请求命令，必须经由内存控制器处理后才能执行。
The controller is used to translate requests coming from host port because DDR2 SDRAM could not execute these com- mands directly.
该小程序是一个bootloader，可以初始化附带的内存控制器，可能从某些外部源载入主程序，然后跳入主程序。
This tiny program is a bootloader that will initialize the attached memory controllers, possibly load the main program from some external source, and jump to it.
然后，结合现代DRAM存储设备的特点，提出了一种以ddr SDRAM为存储设备的新的内存控制器的结构。
And then it presents a novel memory controlling architecture with DDR SDRAM according to the characteristics of the modern DRAM storage devices.
上个月月底，三星曾将一款1.2V 2GB容量的DDR4unbuffered双列直插内存条样品送给了某家内存控制器厂商进行样品测试。
Late last month, Samsung provided 1.2-V 2-Gbyte DDR4 unbuffered dual in-line memory modules (UDIMM) to a controller maker for testing.
SPE不能直接读取主存，相反地必须通过对内存流控制器(或mfc)的单元使用dma命令来在本地存储和主存之间导入和导出数据。
The SPE cannot read main memory directly, but instead must import and export data between the local store and main memory using DMA commands to a unit called the memory flow controller, or MFC.
它们可用来向内存流控制器发出dma命令、处理SPE事件、向PPE和从PPE读写消息。
They are used for issuing DMA commands to the memory flow controller, handling SPE events, and reading and writing messages to and from the PPE.
与内存流控制器(MFC)进行交互的API是由mfs头文件提供的。
The API for interacting with the memory flow controller (MFC) is provided by the MFC headers.
源适配器控制器——源适配器控制器在内存中具有一个“邮箱”，它对此邮箱进行监视，以拾取事件，并将其传递到相应的协作中。
Source adapter controller - the source adapter controller has an in-memory "mailbox" that it monitors to pick up events and passes them to the corresponding collaboration.
视图控制器也可以显示独占的视图、回应低内存警告，以及当方向改变时旋转视图。
View controllers can also display modal views, respond to low-memory warnings, and rotate views when the orientation changes.
计算机硬件的核心器件有CPU、内存、中断控制器、DMA控制器，等等。
The essential hardwares of computer contain CPU, memory, interrupt controller, DMA controller, etc.
这种做法可降低交叉口信号控制器所需的内存等计算资源，实现低成本自适应智能交通信号网络化控制。
It means traffic signal controllers only require less memory and processing power, that is to say "control on demand" which realizes low-cost self-adaptive intelligent traffic signal control.
分析了SDRAM芯片(MT 48lc16 M 16a2tg- 75it)的结构和工作原理，确定了内存sdram控制器的内部结构和工作流程，完成了内存sdram控制器的控制通路和数据通路设计。
Structure and work principle of SDRAM chip (MT48LC16M16A2TG-75IT) is analyzed. Internal architecture and workflow of SDRAM controller is confirmed. Furthermore, its control and data path is designed.
因此，应确保为在其上设置生成控制器的物理计算机或虚拟机提供足够的内存。
Therefore, you should make sure to provide sufficient memory to the physical machine or virtual machine on which you set up your build controllers.
iPhone的不少零部件，包括内存芯片、调制解调器、相机模块、麦克风和触屏控制器，都是苹果从世界各地超过200家供应商那里购买的。
Apple buys many of the components for iPhones - like the memory chip, the modem, the camera module, the microphone and the touch-screen controller - from more than 200 suppliers around the world.
因此，应为在其上创建生成控制器的物理计算机或虚拟机提供足够的内存。
Therefore, you should provide sufficient memory to the physical machine or virtual machine on which you create your build controllers.
识别器检出与轨迹信号相对应的图文记号后，微控制器将其存入内存中，并由显示器显示选出的图文记号。
After the identifier finds out graphic marks corresponding to the trace signals, the micro-controller stores it in the memory and the display displays the selected graphic marks.
控制器的计算标准内存的DDR2SDRAM，并允许的可能性，方案延迟。
Controller is calculated for the standard the memory DDR2 SDRAM and allows the possibility of programming latency.
状态栏包含当前游戏的文件夹，控制器的连接信息，内存消耗关卡的信息。
The Status Bar contains information about the current game folder, console connection information, memory consumption of the level.
状态栏包含当前游戏的文件夹，控制器的连接信息，内存消耗关卡的信息。
The Status Bar contains information about the current game folder, console connection information, memory consumption of the level.
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