文中论述了混合级综合、综合中的功能单元库等问题；提出分辨信号、断言语句应该综合，并给出了综合分辨信号、断言语句的方法；还给出了高级综合中复位信号和时钟信号的处理方法。
The new viewpoints that assertion statement and resolved signal in VHDL should be synthesized are advanced, and the methods to synthesis assertion statement and resolved signal are presented.
文中论述了混合级综合、综合中的功能单元库等问题；提出分辨信号、断言语句应该综合，并给出了综合分辨信号、断言语句的方法；还给出了高级综合中复位信号和时钟信号的处理方法。
The new viewpoints that assertion statement and resolved signal in VHDL should be synthesized are advanced, and the methods to synthesis assertion statement and resolved signal are presented.
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