可以在中断处理器中安全地调用aio_complete 。
中断处理器读寄存器，并提供信息，指出哪一个存储单元出现了奇偶错误。
An interrupt handler reads the register and provides messages indicating which memory bank caused the parity error.
Kprobes提供了一个强行进入任何内核例程并从中断处理器无干扰地收集信息的接口。
Kprobes provides an interface to break into any kernel routine and collect information non-disruptively from the interrupt handler.
在分区的系统中，无法将中断发送到任何处理器。
In a partitioned system, the interrupt cannot be sent to any processor.
禁止所有处理器的中断是不可能的。
It is not possible to disable interrupts across all processors.
这个表格包含中断与中断服务程序之间的处理器的映射，必须由程序员进行初始化。
This table contains the processor's mapping between interrupts and interrupt service routines and must be initialized by the programmer.
在大部分系统中，每个处理器每秒钟发生100次中断。
The interrupts occur 100 times a second per processor on most systems.
表示处理器是否在中断禁用的情况下运行。
Indicates if the processor is running with interrupts disabled.
当某个线程在一个CPU上运行并发生了中断，通常会将它放回到相同的CPU上运行，因为这个处理器的缓存中仍然保存了属于该线程的相关信息。
When a thread is running on a CPU and gets interrupted, it usually gets placed back on the same CPU because the processor's cache might still have lines belonging to the thread.
irqbalance是一个Linux守护进程，它在计算机系统中的处理器和核心之间分发中断。
Irqbalance is a Linux daemon that distributes interrupts over the processors and cores you have in your computer system.
具体来说，Cell处理器包括一个中断控制器和一个IOMMU的实现，它们与早期的内核版本的支持都是不兼容的。
In particular, the Cell processor includes an interrupt controller and an IOMMU implementation, both of which are incompatible with those supported by older kernel versions.
可以启动守护进程irqbalance，在处理器之间动态地分发硬件中断。
A daemon called irqbalance can be started to dynamically distribute hardware interrupts across processors.
CPU电源状态程度越深，采取的电能节省措施就越多 —比如说停止处理器时钟或停止外部中断请求。
The deeper the C state, the more power saving steps are taken—steps like stopping the processor clock or stopping interrupts from coming in.
prev和intpri字段中的值帮助判断处理器是在运行线程还是在运行中断处理程序。
The values in the prev and intpri fields help in determining whether the processor is running a thread or an interrupt handler.
如果发生D -cache失效(处理器无法在D - cache中找到数据)，那么发出一个中断，让相应的寄存器可以通过增加它的值记录这一事件。
If a D-cache miss (the processor fails to find data in the D-cache) occurs, an interrupt is raised so that the corresponding register can record this event by increasing its value.
如果值为非0的值，则处理器正在处理中断。
If the value is non-zero, then the processor was handling an interrupt.
CPU上的每个处理器都拥有自己的CSA(当前保存区)指针，指向当线程或中断处理程序由于上下文切换而被中断或交换时使用的MST。
Each processor on the CPU has its own CSA (current save area) pointer that points to the MST that is to be used when a thread or interrupt handler is interrupted or swapped due to context switch.
当进程处理所捕获的信号时，正在执行的正常指令序列就会被信号处理器临时中断。
When a signal that is being caught is handled by a process, the normal sequence of instructions being executed by the process is temporarily interrupted by the signal handler.
微处理器将在每一个指令末尾检查有无中断。
A microprocessor will check for interrupts at the end of every instruction.
但是如果运行在同一个处理器中的中断例程取得了先前的锁会发生什么呢？
But what happens if the interrupt routine executes in the same processor as the code that took out the lock originally?
当将控制转移到合适的段时，处理器清除IF标志，因此关闭将来的可屏蔽中断。
While transferring control to the proper segment, the processor clears the IF flag, thus disabling further maskable interrupts.
当中断服务程序退出，对处理器的控制权转到先前运行的那个软件上。
When the interrupt service routine exits, control of the processor is returned to whatever part of the software was previously running.
处理器通过缺页中断来进行这个操作。
The processor does this through the use of a page fault interrupt.
当一个中断发生，当前的处理器状态被保存并且中断服务程序开始运行。
When an interrupt occurs, the current state of the processor is saved and an interrupt service routine is executed.
当一个中断发生，当前的处理器状态被保存并且中断服务程序开始运行。
When an interrupt occurs the current state of the processor is saved and an interrupt service routine is executed.
该结构用于在中断正中断了当前进程时，用于保存当前处理器的寄存器内容。通常它不被中断句柄所使用。
Structure used to save the content of the processor's registers at the moment the interrupt interrupted the current process. It is normally not used by the interrupt handler.
为此，采用“中断亲和”的静态调度方法来均衡处理器负载，并降低调度引起的高速缓存命中失败率。
The static scheduling with "Interrupt Affinity" is adopted to balance the load among processors, and to reduce the cache misses due to .
唯一的不同是在保护模式中微处理器访问IDT而不是中断向量表。
The only difference is that in protected mode the microprocessor accessed the IDT instead of the interrupt vector table.
由于NUAL程序的特点，在NUAL处理器中实现精确中断比较困难。
Due to the characteristics of the NUAL program, it is difficult to implement precise interrupts in a NUAL processor.
由于NUAL程序的特点，在NUAL处理器中实现精确中断比较困难。
Due to the characteristics of the NUAL program, it is difficult to implement precise interrupts in a NUAL processor.
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