改进了互补逻辑—交替互补逻辑(CL - ACL)结构,并做了考虑门级延迟的模拟验证。
Then, CL-ACL structure is improved, simulation and verification under real gate delay is done.
本文在传统的门级逻辑模拟模型和算法的基础上引进了一些新概念,导出了一种新的分析模型和算法。
A new analytical model and some algorithms based on the conventional gate-level simulation are presented in this article.
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