The netlist of synthesis has passed the gate-level simulation.
最后，对逻辑综合产生的门级网表进行了门级仿真。
参考来源 - 8位MCU IP核的设计与应用·2,447,543篇论文数据，部分数据来源于NoteExpress
对MCS—51单片机进行正向设计，包括系统划分、编写代码、RTL级仿真与综合、门级仿真等。
The design of MCS-51 Microcontroller is followed the Top-Down design way, including system partition coding (VHDL) RTL simulation synthesis, gate level simulation ect.
LOP电路设计采用VHDL语言门级描述，已通过逻辑仿真验证，并在浮点加法器的设计中得到应用。
The LOP circuit module is described in gate level with VHDL, which has passed the logic simulation and verification. It is applied to the design of floating-point adder.
本课题结合项目的要求，对分组传送芯片组中一款千万门级的流量管理芯片进行了仿真验证。
Complying with the requirement of the project, the simulation of traffic managing chip with ten million gates in chips of packet transport networks is executed in this subject.
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