...而IC3D的输出则是某个视窗比较器的逻辑输出，在该比较器中，只有当Z轴输出电压介于VREFA和VREFB时，才会出现逻辑低（logic low），它以电源中压VS/2为基准。
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如果电源电压减小，则选择信号的状态从逻辑高改变为逻辑低。
If the power supply voltage decreases, the state of the select signal is changed from a logic high to a logic low.
在过去的低速率的美好日子里，我们可以把数字信号想象成像直流信号一样，逻辑高时开，逻辑低时关。
In the good old days, we could think of digital signals as though they were DC signals that turned on and off with logic-highs and logic-lows.
它提供了一个框架来为设备通信构建设备适配器，并为面向低延迟需求的业务逻辑提供了一个位置。
It provides a framework to build device adapters for device communications, and also provides a location for business logic with low latency requirements.
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